Unisim

Object
- Enum<Unisim>
- - com.xilinx.rapidwright.design.Unisim

All Implemented Interfaces:

Serializable, Comparable<Unisim>
```
public enum Unisim
extends Enum<Unisim>
```
Generated on: Wed May 01 19:57:08 MDT 2024 by: com.xilinx.rapidwright.release.UnisimParser Enumerates supported Unisim primitives that map to Xilinx devices.

Enum Constant Summary

Enum Constants
Enum Constant and Description
`AIE_ML_NOC_M_AXI`
`AIE_ML_NOC_M_AXIS`
`AIE_ML_NOC_S_AXI`
`AIE_ML_NOC_S_AXIS`
`AIE_ML_PL_M_AXIS128`
`AIE_ML_PL_M_AXIS32`
`AIE_ML_PL_M_AXIS64`
`AIE_ML_PL_M_EVENTS`
`AIE_ML_PL_S_AXIS128`
`AIE_ML_PL_S_AXIS32`
`AIE_ML_PL_S_AXIS64`
`AIE_ML_PL_S_EVENTS`
`AIE_NOC_M_AXI`
`AIE_NOC_M_AXIS`
`AIE_NOC_S_AXI`
`AIE_NOC_S_AXIS`
`AIE_PL_M_AXIS128`
`AIE_PL_M_AXIS32`
`AIE_PL_M_AXIS64`
`AIE_PL_M_EVENTS`
`AIE_PL_S_AXIS128`
`AIE_PL_S_AXIS32`
`AIE_PL_S_AXIS64`
`AIE_PL_S_EVENTS`
`AMS_ADC`
`AMS_DAC`
`AND2`
`AND2B1`
`AND2B1L`
`AND2B2`
`AND3`
`AND3B1`
`AND3B2`
`AND3B3`
`AND4`
`AND4B1`
`AND4B2`
`AND4B3`
`AND4B4`
`AND5`
`AND5B1`
`AND5B2`
`AND5B3`
`AND5B4`
`AND5B5`
`AUTOBUF`
`BFR_MATMULX`
`BIBUF`
`BITSLICE_CONTROL`
`BSCAN_SPARTAN3`
`BSCAN_SPARTAN3A`
`BSCAN_SPARTAN6`
`BSCAN_VIRTEX4`
`BSCAN_VIRTEX5`
`BSCAN_VIRTEX6`
`BSCANE2`
`BUF`
`BUFCE_LEAF`
`BUFCE_ROW`
`BUFDIV_LEAF`
`BUFG`
`BUFG_FABRIC`
`BUFG_GT`
`BUFG_GT_SYNC`
`BUFG_HM`
`BUFG_LB`
`BUFG_PS`
`BUFGCE`
`BUFGCE_1`
`BUFGCE_DIV`
`BUFGCTRL`
`BUFGMUX`
`BUFGMUX_1`
`BUFGMUX_CTRL`
`BUFGMUX_VIRTEX4`
`BUFGP`
`BUFH`
`BUFHCE`
`BUFIO`
`BUFIO2`
`BUFIODQS`
`BUFMR`
`BUFMRCE`
`BUFR`
`CAPTURE_SPARTAN3`
`CAPTURE_SPARTAN3A`
`CAPTURE_VIRTEX4`
`CAPTURE_VIRTEX5`
`CAPTURE_VIRTEX6`
`CAPTUREE2`
`CARRY4`
`CARRY8`
`CFGLUT5`
`CLKDLL`
`CLKDLLE`
`CLKDLLHF`
`CLOCK_MOD_CLE_FF`
`CLOCK_MOD_CLE_IMR`
`CLOCK_MOD_IRI_FF`
`CLOCK_MOD_IRI_IMR`
`CMAC`
`CMACE4`
`CMPHY_OCTAD`
`CPM`
`CPM_EXT`
`CPM_MAIN`
`CPM5`
`CPM5N`
`DCIRESET`
`DCM`
`DCM_ADV`
`DCM_BASE`
`DCM_PS`
`DCM_SP`
`DCMAC`
`DDRMC`
`DDRMC_RIU`
`DDRMC5`
`DDRMC5C`
`DFE_CFR`
`DFE_DUC_DDC`
`DFE_FFT`
`DFE_FIR`
`DFE_MATRIX_FIR`
`DFE_NL_FIR`
`DFE_PQ_DECIM`
`DFE_PQ_INTERP`
`DFE_PRACH`
`DIFFINBUF`
`DNA_PORT`
`DNA_PORTE2`
`DPHY_DIFFINBUF`
`DPLL`
`DSP_A_B_DATA`
`DSP_A_B_DATA58`
`DSP_ALU`
`DSP_ALUADD`
`DSP_ALUMUX`
`DSP_ALUREG`
`DSP_C_DATA`
`DSP_C_DATA58`
`DSP_CPLX_STAGE0`
`DSP_CPLX_STAGE1`
`DSP_FP_ADDER`
`DSP_FP_INMUX`
`DSP_FP_INREG`
`DSP_FP_OUTPUT`
`DSP_FP_SRCMX_OPTINV`
`DSP_FPA_CREG`
`DSP_FPA_OPM_REG`
`DSP_FPM_PIPEREG`
`DSP_FPM_STAGE0`
`DSP_FPM_STAGE1`
`DSP_M_DATA`
`DSP_M_DATA58`
`DSP_MULTIPLIER`
`DSP_MULTIPLIER58`
`DSP_OUTPUT`
`DSP_OUTPUT58`
`DSP_PATDET`
`DSP_PREADD`
`DSP_PREADD_DATA`
`DSP_PREADD_DATA58`
`DSP_PREADD58`
`DSP_SRCMX_OPTINV`
`DSP48`
`DSP48A`
`DSP48A1`
`DSP48E`
`DSP48E1`
`DSP48E2`
`DSP48E5`
`DSP58`
`DSP58C`
`DSPCPLX`
`DSPFP32`
`EFUSE_USR`
`FD`
`FD_1`
`FDC`
`FDC_1`
`FDCE`
`FDCE_1`
`FDCP`
`FDCP_1`
`FDCPE`
`FDCPE_1`
`FDE`
`FDE_1`
`FDP`
`FDP_1`
`FDPE`
`FDPE_1`
`FDR`
`FDR_1`
`FDRE`
`FDRE_1`
`FDRS`
`FDRS_1`
`FDRSE`
`FDRSE_1`
`FDS`
`FDS_1`
`FDSE`
`FDSE_1`
`FE`
`FIFO16`
`FIFO18`
`FIFO18_36`
`FIFO18E1`
`FIFO18E2`
`FIFO36`
`FIFO36_72`
`FIFO36E1`
`FIFO36E2`
`FRAME_ECC_VIRTEX6`
`FRAME_ECCE2`
`FRAME_ECCE3`
`FRAME_ECCE4`
`GND`
`GTF_CHANNEL`
`GTF_COMMON`
`GTHE2_CHANNEL`
`GTHE2_COMMON`
`GTHE3_CHANNEL`
`GTHE3_COMMON`
`GTHE4_CHANNEL`
`GTHE4_COMMON`
`GTM_DUAL`
`GTME5_QUAD`
`GTPA1_DUAL`
`GTPE2_CHANNEL`
`GTPE2_COMMON`
`GTXE1`
`GTXE2_CHANNEL`
`GTXE2_COMMON`
`GTYE3_CHANNEL`
`GTYE3_COMMON`
`GTYE4_CHANNEL`
`GTYE4_COMMON`
`GTYE5_QUAD`
`GTYP_QUAD`
`HARD_INV`
`HARD_SYNC`
`HBM_IO_CHNL`
`HBM_IO_MS`
`HBM_MC`
`HBM_ONE_STACK_INTF`
`HBM_PHY_CHNL`
`HBM_PHY_MS`
`HBM_REF_CLK`
`HBM_SNGLBLI_INTF_APB`
`HBM_SNGLBLI_INTF_AXI`
`HBM_TWO_STACK_INTF`
`HNICPIPE_QUAD`
`HNICX`
`HPIO_VREF`
`HPLL`
`HSADC`
`HSDAC`
`IBUF`
`IBUF_AGP`
`IBUF_ANALOG`
`IBUF_CTT`
`IBUF_GTL`
`IBUF_GTL_DCI`
`IBUF_GTLP`
`IBUF_GTLP_DCI`
`IBUF_HSTL_I`
`IBUF_HSTL_I_18`
`IBUF_HSTL_I_DCI`
`IBUF_HSTL_I_DCI_18`
`IBUF_HSTL_II`
`IBUF_HSTL_II_18`
`IBUF_HSTL_II_DCI`
`IBUF_HSTL_II_DCI_18`
`IBUF_HSTL_III`
`IBUF_HSTL_III_18`
`IBUF_HSTL_III_DCI`
`IBUF_HSTL_III_DCI_18`
`IBUF_HSTL_IV`
`IBUF_HSTL_IV_18`
`IBUF_HSTL_IV_DCI`
`IBUF_HSTL_IV_DCI_18`
`IBUF_IBUFDISABLE`
`IBUF_INTERMDISABLE`
`IBUF_LVCMOS12`
`IBUF_LVCMOS15`
`IBUF_LVCMOS18`
`IBUF_LVCMOS2`
`IBUF_LVCMOS25`
`IBUF_LVCMOS33`
`IBUF_LVDCI_15`
`IBUF_LVDCI_18`
`IBUF_LVDCI_25`
`IBUF_LVDCI_33`
`IBUF_LVDCI_DV2_15`
`IBUF_LVDCI_DV2_18`
`IBUF_LVDCI_DV2_25`
`IBUF_LVDCI_DV2_33`
`IBUF_LVDS`
`IBUF_LVPECL`
`IBUF_LVTTL`
`IBUF_PCI33_3`
`IBUF_PCI33_5`
`IBUF_PCI66_3`
`IBUF_PCIX`
`IBUF_PCIX66_3`
`IBUF_SSTL18_I`
`IBUF_SSTL18_I_DCI`
`IBUF_SSTL18_II`
`IBUF_SSTL18_II_DCI`
`IBUF_SSTL2_I`
`IBUF_SSTL2_I_DCI`
`IBUF_SSTL2_II`
`IBUF_SSTL2_II_DCI`
`IBUF_SSTL3_I`
`IBUF_SSTL3_I_DCI`
`IBUF_SSTL3_II`
`IBUF_SSTL3_II_DCI`
`IBUFCTRL`
`IBUFDS`
`IBUFDS_BLVDS_25`
`IBUFDS_DIFF_OUT`
`IBUFDS_DIFF_OUT_IBUFDISABLE`
`IBUFDS_DIFF_OUT_INTERMDISABLE`
`IBUFDS_DPHY`
`IBUFDS_GTE2`
`IBUFDS_GTE3`
`IBUFDS_GTE4`
`IBUFDS_GTE5`
`IBUFDS_GTM`
`IBUFDS_GTME5`
`IBUFDS_GTXE1`
`IBUFDS_IBUFDISABLE`
`IBUFDS_IBUFDISABLE_INT`
`IBUFDS_INTERMDISABLE`
`IBUFDS_INTERMDISABLE_INT`
`IBUFDS_LDT_25`
`IBUFDS_LVDS_25`
`IBUFDS_LVDS_25_DCI`
`IBUFDS_LVDS_33`
`IBUFDS_LVDS_33_DCI`
`IBUFDS_LVDSEXT_25`
`IBUFDS_LVDSEXT_25_DCI`
`IBUFDS_LVDSEXT_33`
`IBUFDS_LVDSEXT_33_DCI`
`IBUFDS_LVPECL_25`
`IBUFDS_LVPECL_33`
`IBUFDS_ULVDS_25`
`IBUFDSE3`
`IBUFE3`
`IBUFG`
`IBUFG_AGP`
`IBUFG_CTT`
`IBUFG_GTL`
`IBUFG_GTL_DCI`
`IBUFG_GTLP`
`IBUFG_GTLP_DCI`
`IBUFG_HSTL_I`
`IBUFG_HSTL_I_18`
`IBUFG_HSTL_I_DCI`
`IBUFG_HSTL_I_DCI_18`
`IBUFG_HSTL_II`
`IBUFG_HSTL_II_18`
`IBUFG_HSTL_II_DCI`
`IBUFG_HSTL_II_DCI_18`
`IBUFG_HSTL_III`
`IBUFG_HSTL_III_18`
`IBUFG_HSTL_III_DCI`
`IBUFG_HSTL_III_DCI_18`
`IBUFG_HSTL_IV`
`IBUFG_HSTL_IV_18`
`IBUFG_HSTL_IV_DCI`
`IBUFG_HSTL_IV_DCI_18`
`IBUFG_LVCMOS12`
`IBUFG_LVCMOS15`
`IBUFG_LVCMOS18`
`IBUFG_LVCMOS2`
`IBUFG_LVCMOS25`
`IBUFG_LVCMOS33`
`IBUFG_LVDCI_15`
`IBUFG_LVDCI_18`
`IBUFG_LVDCI_25`
`IBUFG_LVDCI_33`
`IBUFG_LVDCI_DV2_15`
`IBUFG_LVDCI_DV2_18`
`IBUFG_LVDCI_DV2_25`
`IBUFG_LVDCI_DV2_33`
`IBUFG_LVDS`
`IBUFG_LVPECL`
`IBUFG_LVTTL`
`IBUFG_PCI33_3`
`IBUFG_PCI33_5`
`IBUFG_PCI66_3`
`IBUFG_PCIX`
`IBUFG_PCIX66_3`
`IBUFG_SSTL18_I`
`IBUFG_SSTL18_I_DCI`
`IBUFG_SSTL18_II`
`IBUFG_SSTL18_II_DCI`
`IBUFG_SSTL2_I`
`IBUFG_SSTL2_I_DCI`
`IBUFG_SSTL2_II`
`IBUFG_SSTL2_II_DCI`
`IBUFG_SSTL3_I`
`IBUFG_SSTL3_I_DCI`
`IBUFG_SSTL3_II`
`IBUFG_SSTL3_II_DCI`
`IBUFGDS`
`IBUFGDS_BLVDS_25`
`IBUFGDS_DIFF_OUT`
`IBUFGDS_LDT_25`
`IBUFGDS_LVDS_25`
`IBUFGDS_LVDS_25_DCI`
`IBUFGDS_LVDS_33`
`IBUFGDS_LVDS_33_DCI`
`IBUFGDS_LVDSEXT_25`
`IBUFGDS_LVDSEXT_25_DCI`
`IBUFGDS_LVDSEXT_33`
`IBUFGDS_LVDSEXT_33_DCI`
`IBUFGDS_LVPECL_25`
`IBUFGDS_LVPECL_33`
`IBUFGDS_ULVDS_25`
`ICAP_SPARTAN3A`
`ICAP_SPARTAN6`
`ICAP_VIRTEX4`
`ICAP_VIRTEX5`
`ICAP_VIRTEX6`
`ICAPE2`
`ICAPE3`
`IDDR`
`IDDR_2CLK`
`IDDR2`
`IDDRE1`
`IDELAY`
`IDELAYCTRL`
`IDELAYE2`
`IDELAYE2_FINEDELAY`
`IDELAYE3`
`IDELAYE5`
`ILKN`
`ILKNE4`
`ILKNF`
`IMC_FF`
`IMI_FF`
`IN_FIFO`
`INBUF`
`INV`
`IOBUF`
`IOBUF_AGP`
`IOBUF_ANALOG`
`IOBUF_CTT`
`IOBUF_DCIEN`
`IOBUF_F_12`
`IOBUF_F_16`
`IOBUF_F_2`
`IOBUF_F_24`
`IOBUF_F_4`
`IOBUF_F_6`
`IOBUF_F_8`
`IOBUF_GTL`
`IOBUF_GTL_DCI`
`IOBUF_GTLP`
`IOBUF_GTLP_DCI`
`IOBUF_HSTL_I`
`IOBUF_HSTL_I_18`
`IOBUF_HSTL_II`
`IOBUF_HSTL_II_18`
`IOBUF_HSTL_II_DCI`
`IOBUF_HSTL_II_DCI_18`
`IOBUF_HSTL_III`
`IOBUF_HSTL_III_18`
`IOBUF_HSTL_IV`
`IOBUF_HSTL_IV_18`
`IOBUF_HSTL_IV_DCI`
`IOBUF_HSTL_IV_DCI_18`
`IOBUF_INTERMDISABLE`
`IOBUF_LVCMOS12`
`IOBUF_LVCMOS12_F_2`
`IOBUF_LVCMOS12_F_4`
`IOBUF_LVCMOS12_F_6`
`IOBUF_LVCMOS12_F_8`
`IOBUF_LVCMOS12_S_2`
`IOBUF_LVCMOS12_S_4`
`IOBUF_LVCMOS12_S_6`
`IOBUF_LVCMOS12_S_8`
`IOBUF_LVCMOS15`
`IOBUF_LVCMOS15_F_12`
`IOBUF_LVCMOS15_F_16`
`IOBUF_LVCMOS15_F_2`
`IOBUF_LVCMOS15_F_4`
`IOBUF_LVCMOS15_F_6`
`IOBUF_LVCMOS15_F_8`
`IOBUF_LVCMOS15_S_12`
`IOBUF_LVCMOS15_S_16`
`IOBUF_LVCMOS15_S_2`
`IOBUF_LVCMOS15_S_4`
`IOBUF_LVCMOS15_S_6`
`IOBUF_LVCMOS15_S_8`
`IOBUF_LVCMOS18`
`IOBUF_LVCMOS18_F_12`
`IOBUF_LVCMOS18_F_16`
`IOBUF_LVCMOS18_F_2`
`IOBUF_LVCMOS18_F_4`
`IOBUF_LVCMOS18_F_6`
`IOBUF_LVCMOS18_F_8`
`IOBUF_LVCMOS18_S_12`
`IOBUF_LVCMOS18_S_16`
`IOBUF_LVCMOS18_S_2`
`IOBUF_LVCMOS18_S_4`
`IOBUF_LVCMOS18_S_6`
`IOBUF_LVCMOS18_S_8`
`IOBUF_LVCMOS2`
`IOBUF_LVCMOS25`
`IOBUF_LVCMOS25_F_12`
`IOBUF_LVCMOS25_F_16`
`IOBUF_LVCMOS25_F_2`
`IOBUF_LVCMOS25_F_24`
`IOBUF_LVCMOS25_F_4`
`IOBUF_LVCMOS25_F_6`
`IOBUF_LVCMOS25_F_8`
`IOBUF_LVCMOS25_S_12`
`IOBUF_LVCMOS25_S_16`
`IOBUF_LVCMOS25_S_2`
`IOBUF_LVCMOS25_S_24`
`IOBUF_LVCMOS25_S_4`
`IOBUF_LVCMOS25_S_6`
`IOBUF_LVCMOS25_S_8`
`IOBUF_LVCMOS33`
`IOBUF_LVCMOS33_F_12`
`IOBUF_LVCMOS33_F_16`
`IOBUF_LVCMOS33_F_2`
`IOBUF_LVCMOS33_F_24`
`IOBUF_LVCMOS33_F_4`
`IOBUF_LVCMOS33_F_6`
`IOBUF_LVCMOS33_F_8`
`IOBUF_LVCMOS33_S_12`
`IOBUF_LVCMOS33_S_16`
`IOBUF_LVCMOS33_S_2`
`IOBUF_LVCMOS33_S_24`
`IOBUF_LVCMOS33_S_4`
`IOBUF_LVCMOS33_S_6`
`IOBUF_LVCMOS33_S_8`
`IOBUF_LVDCI_15`
`IOBUF_LVDCI_18`
`IOBUF_LVDCI_25`
`IOBUF_LVDCI_33`
`IOBUF_LVDCI_DV2_15`
`IOBUF_LVDCI_DV2_18`
`IOBUF_LVDCI_DV2_25`
`IOBUF_LVDCI_DV2_33`
`IOBUF_LVDS`
`IOBUF_LVPECL`
`IOBUF_LVTTL`
`IOBUF_LVTTL_F_12`
`IOBUF_LVTTL_F_16`
`IOBUF_LVTTL_F_2`
`IOBUF_LVTTL_F_24`
`IOBUF_LVTTL_F_4`
`IOBUF_LVTTL_F_6`
`IOBUF_LVTTL_F_8`
`IOBUF_LVTTL_S_12`
`IOBUF_LVTTL_S_16`
`IOBUF_LVTTL_S_2`
`IOBUF_LVTTL_S_24`
`IOBUF_LVTTL_S_4`
`IOBUF_LVTTL_S_6`
`IOBUF_LVTTL_S_8`
`IOBUF_ODDR`
`IOBUF_PCI33_3`
`IOBUF_PCI33_5`
`IOBUF_PCI66_3`
`IOBUF_PCIX`
`IOBUF_PCIX66_3`
`IOBUF_S_12`
`IOBUF_S_16`
`IOBUF_S_2`
`IOBUF_S_24`
`IOBUF_S_4`
`IOBUF_S_6`
`IOBUF_S_8`
`IOBUF_SSTL18_I`
`IOBUF_SSTL18_II`
`IOBUF_SSTL18_II_DCI`
`IOBUF_SSTL2_I`
`IOBUF_SSTL2_II`
`IOBUF_SSTL2_II_DCI`
`IOBUF_SSTL3_I`
`IOBUF_SSTL3_II`
`IOBUF_SSTL3_II_DCI`
`IOBUFDS`
`IOBUFDS_BLVDS_25`
`IOBUFDS_COMP`
`IOBUFDS_COMP_ODDR`
`IOBUFDS_DCIEN`
`IOBUFDS_DIFF_OUT`
`IOBUFDS_DIFF_OUT_DCIEN`
`IOBUFDS_DIFF_OUT_INTERMDISABLE`
`IOBUFDS_DIFF_OUT_INTERMDISABLE_ODDR`
`IOBUFDS_DIFF_OUT_ODDR`
`IOBUFDS_INTERMDISABLE`
`IOBUFDS_INTERMDISABLE_ODDR`
`IOBUFDS_ODDR`
`IOBUFDSE3`
`IOBUFE3`
`IODELAY`
`IODELAY2`
`IODELAYE1`
`ISERDES`
`ISERDES_NODELAY`
`ISERDESE1`
`ISERDESE2`
`ISERDESE3`
`ISP2`
`JTAG_SIME2`
`KEEPER`
`KEY_CLEAR`
`LCLK_DELAY`
`LD`
`LD_1`
`LDC`
`LDC_1`
`LDCE`
`LDCE_1`
`LDCP`
`LDCP_1`
`LDCPE`
`LDCPE_1`
`LDE`
`LDE_1`
`LDP`
`LDP_1`
`LDPE`
`LDPE_1`
`LOOKAHEAD8`
`LUT1`
`LUT1_D`
`LUT1_L`
`LUT2`
`LUT2_D`
`LUT2_L`
`LUT3`
`LUT3_D`
`LUT3_L`
`LUT4`
`LUT4_D`
`LUT4_L`
`LUT5`
`LUT5_D`
`LUT5_L`
`LUT6`
`LUT6_2`
`LUT6_D`
`LUT6_L`
`LUT6CY`
`LUTCY1`
`LUTCY2`
`MASTER_JTAG`
`MBUFG_GT`
`MBUFG_HM`
`MBUFG_PS`
`MBUFGCE`
`MBUFGCE_DIV`
`MBUFGCTRL`
`ME_NOC_M_AXI`
`ME_NOC_M_AXIS`
`ME_NOC_S_AXI`
`ME_NOC_S_AXIS`
`ME_PL_M_AXIS128`
`ME_PL_M_AXIS32`
`ME_PL_M_AXIS64`
`ME_PL_M_EVENTS`
`ME_PL_S_AXIS128`
`ME_PL_S_AXIS32`
`ME_PL_S_AXIS64`
`ME_PL_S_EVENTS`
`MMCM_ADV`
`MMCM_BASE`
`MMCME2_ADV`
`MMCME2_BASE`
`MMCME3_ADV`
`MMCME3_BASE`
`MMCME4_ADV`
`MMCME4_BASE`
`MMCME5`
`MMI`
`MRMAC`
`MULT_AND`
`MULT18X18`
`MULT18X18S`
`MULT18X18SIO`
`MUXCY`
`MUXCY_D`
`MUXCY_L`
`MUXF5`
`MUXF5_D`
`MUXF5_L`
`MUXF6`
`MUXF6_D`
`MUXF6_L`
`MUXF7`
`MUXF7_D`
`MUXF7_L`
`MUXF8`
`MUXF8_D`
`MUXF8_L`
`MUXF9`
`NAND2`
`NAND2B1`
`NAND2B2`
`NAND3`
`NAND3B1`
`NAND3B2`
`NAND3B3`
`NAND4`
`NAND4B1`
`NAND4B2`
`NAND4B3`
`NAND4B4`
`NAND5`
`NAND5B1`
`NAND5B2`
`NAND5B3`
`NAND5B4`
`NAND5B5`
`NOC_NCRB`
`NOC_NCRB_SSIT`
`NOC_NIDB`
`NOC_NMU_HBM2E`
`NOC_NMU128`
`NOC_NMU256`
`NOC_NMU512`
`NOC_NPP_RPTR`
`NOC_NPS_VNOC`
`NOC_NPS4`
`NOC_NPS5555`
`NOC_NPS6`
`NOC_NPS7575`
`NOC_NSU128`
`NOC_NSU512`
`NOC2_NMU128`
`NOC2_NMU256`
`NOC2_NMU512`
`NOC2_NPS5555`
`NOC2_NPS7575`
`NOC2_NSU128`
`NOC2_NSU256`
`NOC2_NSU512`
`NOC2_XBR2X4`
`NOC2_XBR4X2`
`NOR2`
`NOR2B1`
`NOR2B2`
`NOR3`
`NOR3B1`
`NOR3B2`
`NOR3B3`
`NOR4`
`NOR4B1`
`NOR4B2`
`NOR4B3`
`NOR4B4`
`NOR5`
`NOR5B1`
`NOR5B2`
`NOR5B3`
`NOR5B4`
`NOR5B5`
`NPI_NIR`
`OBUF`
`OBUF_AGP`
`OBUF_CTT`
`OBUF_F_12`
`OBUF_F_16`
`OBUF_F_2`
`OBUF_F_24`
`OBUF_F_4`
`OBUF_F_6`
`OBUF_F_8`
`OBUF_GTL`
`OBUF_GTL_DCI`
`OBUF_GTLP`
`OBUF_GTLP_DCI`
`OBUF_HSTL_I`
`OBUF_HSTL_I_18`
`OBUF_HSTL_I_DCI`
`OBUF_HSTL_I_DCI_18`
`OBUF_HSTL_II`
`OBUF_HSTL_II_18`
`OBUF_HSTL_II_DCI`
`OBUF_HSTL_II_DCI_18`
`OBUF_HSTL_III`
`OBUF_HSTL_III_18`
`OBUF_HSTL_III_DCI`
`OBUF_HSTL_III_DCI_18`
`OBUF_HSTL_IV`
`OBUF_HSTL_IV_18`
`OBUF_HSTL_IV_DCI`
`OBUF_HSTL_IV_DCI_18`
`OBUF_LVCMOS12`
`OBUF_LVCMOS12_F_2`
`OBUF_LVCMOS12_F_4`
`OBUF_LVCMOS12_F_6`
`OBUF_LVCMOS12_F_8`
`OBUF_LVCMOS12_S_2`
`OBUF_LVCMOS12_S_4`
`OBUF_LVCMOS12_S_6`
`OBUF_LVCMOS12_S_8`
`OBUF_LVCMOS15`
`OBUF_LVCMOS15_F_12`
`OBUF_LVCMOS15_F_16`
`OBUF_LVCMOS15_F_2`
`OBUF_LVCMOS15_F_4`
`OBUF_LVCMOS15_F_6`
`OBUF_LVCMOS15_F_8`
`OBUF_LVCMOS15_S_12`
`OBUF_LVCMOS15_S_16`
`OBUF_LVCMOS15_S_2`
`OBUF_LVCMOS15_S_4`
`OBUF_LVCMOS15_S_6`
`OBUF_LVCMOS15_S_8`
`OBUF_LVCMOS18`
`OBUF_LVCMOS18_F_12`
`OBUF_LVCMOS18_F_16`
`OBUF_LVCMOS18_F_2`
`OBUF_LVCMOS18_F_4`
`OBUF_LVCMOS18_F_6`
`OBUF_LVCMOS18_F_8`
`OBUF_LVCMOS18_S_12`
`OBUF_LVCMOS18_S_16`
`OBUF_LVCMOS18_S_2`
`OBUF_LVCMOS18_S_4`
`OBUF_LVCMOS18_S_6`
`OBUF_LVCMOS18_S_8`
`OBUF_LVCMOS2`
`OBUF_LVCMOS25`
`OBUF_LVCMOS25_F_12`
`OBUF_LVCMOS25_F_16`
`OBUF_LVCMOS25_F_2`
`OBUF_LVCMOS25_F_24`
`OBUF_LVCMOS25_F_4`
`OBUF_LVCMOS25_F_6`
`OBUF_LVCMOS25_F_8`
`OBUF_LVCMOS25_S_12`
`OBUF_LVCMOS25_S_16`
`OBUF_LVCMOS25_S_2`
`OBUF_LVCMOS25_S_24`
`OBUF_LVCMOS25_S_4`
`OBUF_LVCMOS25_S_6`
`OBUF_LVCMOS25_S_8`
`OBUF_LVCMOS33`
`OBUF_LVCMOS33_F_12`
`OBUF_LVCMOS33_F_16`
`OBUF_LVCMOS33_F_2`
`OBUF_LVCMOS33_F_24`
`OBUF_LVCMOS33_F_4`
`OBUF_LVCMOS33_F_6`
`OBUF_LVCMOS33_F_8`
`OBUF_LVCMOS33_S_12`
`OBUF_LVCMOS33_S_16`
`OBUF_LVCMOS33_S_2`
`OBUF_LVCMOS33_S_24`
`OBUF_LVCMOS33_S_4`
`OBUF_LVCMOS33_S_6`
`OBUF_LVCMOS33_S_8`
`OBUF_LVDCI_15`
`OBUF_LVDCI_18`
`OBUF_LVDCI_25`
`OBUF_LVDCI_33`
`OBUF_LVDCI_DV2_15`
`OBUF_LVDCI_DV2_18`
`OBUF_LVDCI_DV2_25`
`OBUF_LVDCI_DV2_33`
`OBUF_LVDS`
`OBUF_LVPECL`
`OBUF_LVTTL`
`OBUF_LVTTL_F_12`
`OBUF_LVTTL_F_16`
`OBUF_LVTTL_F_2`
`OBUF_LVTTL_F_24`
`OBUF_LVTTL_F_4`
`OBUF_LVTTL_F_6`
`OBUF_LVTTL_F_8`
`OBUF_LVTTL_S_12`
`OBUF_LVTTL_S_16`
`OBUF_LVTTL_S_2`
`OBUF_LVTTL_S_24`
`OBUF_LVTTL_S_4`
`OBUF_LVTTL_S_6`
`OBUF_LVTTL_S_8`
`OBUF_ODDR`
`OBUF_PCI33_3`
`OBUF_PCI33_5`
`OBUF_PCI66_3`
`OBUF_PCIX`
`OBUF_PCIX66_3`
`OBUF_S_12`
`OBUF_S_16`
`OBUF_S_2`
`OBUF_S_24`
`OBUF_S_4`
`OBUF_S_6`
`OBUF_S_8`
`OBUF_SSTL18_I`
`OBUF_SSTL18_I_DCI`
`OBUF_SSTL18_II`
`OBUF_SSTL18_II_DCI`
`OBUF_SSTL2_I`
`OBUF_SSTL2_I_DCI`
`OBUF_SSTL2_II`
`OBUF_SSTL2_II_DCI`
`OBUF_SSTL3_I`
`OBUF_SSTL3_I_DCI`
`OBUF_SSTL3_II`
`OBUF_SSTL3_II_DCI`
`OBUFDS`
`OBUFDS_BLVDS_25`
`OBUFDS_COMP`
`OBUFDS_COMP_ODDR`
`OBUFDS_DPHY`
`OBUFDS_DPHY_COMP`
`OBUFDS_GTE3`
`OBUFDS_GTE3_ADV`
`OBUFDS_GTE4`
`OBUFDS_GTE4_ADV`
`OBUFDS_GTE5`
`OBUFDS_GTE5_ADV`
`OBUFDS_GTM`
`OBUFDS_GTM_ADV`
`OBUFDS_GTME5`
`OBUFDS_GTME5_ADV`
`OBUFDS_LDT_25`
`OBUFDS_LVDS_25`
`OBUFDS_LVDS_33`
`OBUFDS_LVDSEXT_25`
`OBUFDS_LVDSEXT_33`
`OBUFDS_LVPECL_25`
`OBUFDS_LVPECL_33`
`OBUFDS_ODDR`
`OBUFDS_ULVDS_25`
`OBUFT`
`OBUFT_AGP`
`OBUFT_CTT`
`OBUFT_DCIEN`
`OBUFT_F_12`
`OBUFT_F_16`
`OBUFT_F_2`
`OBUFT_F_24`
`OBUFT_F_4`
`OBUFT_F_6`
`OBUFT_F_8`
`OBUFT_GTL`
`OBUFT_GTL_DCI`
`OBUFT_GTLP`
`OBUFT_GTLP_DCI`
`OBUFT_HSTL_I`
`OBUFT_HSTL_I_18`
`OBUFT_HSTL_I_DCI`
`OBUFT_HSTL_I_DCI_18`
`OBUFT_HSTL_II`
`OBUFT_HSTL_II_18`
`OBUFT_HSTL_II_DCI`
`OBUFT_HSTL_II_DCI_18`
`OBUFT_HSTL_III`
`OBUFT_HSTL_III_18`
`OBUFT_HSTL_III_DCI`
`OBUFT_HSTL_III_DCI_18`
`OBUFT_HSTL_IV`
`OBUFT_HSTL_IV_18`
`OBUFT_HSTL_IV_DCI`
`OBUFT_HSTL_IV_DCI_18`
`OBUFT_LVCMOS12`
`OBUFT_LVCMOS12_F_2`
`OBUFT_LVCMOS12_F_4`
`OBUFT_LVCMOS12_F_6`
`OBUFT_LVCMOS12_F_8`
`OBUFT_LVCMOS12_S_2`
`OBUFT_LVCMOS12_S_4`
`OBUFT_LVCMOS12_S_6`
`OBUFT_LVCMOS12_S_8`
`OBUFT_LVCMOS15`
`OBUFT_LVCMOS15_F_12`
`OBUFT_LVCMOS15_F_16`
`OBUFT_LVCMOS15_F_2`
`OBUFT_LVCMOS15_F_4`
`OBUFT_LVCMOS15_F_6`
`OBUFT_LVCMOS15_F_8`
`OBUFT_LVCMOS15_S_12`
`OBUFT_LVCMOS15_S_16`
`OBUFT_LVCMOS15_S_2`
`OBUFT_LVCMOS15_S_4`
`OBUFT_LVCMOS15_S_6`
`OBUFT_LVCMOS15_S_8`
`OBUFT_LVCMOS18`
`OBUFT_LVCMOS18_F_12`
`OBUFT_LVCMOS18_F_16`
`OBUFT_LVCMOS18_F_2`
`OBUFT_LVCMOS18_F_4`
`OBUFT_LVCMOS18_F_6`
`OBUFT_LVCMOS18_F_8`
`OBUFT_LVCMOS18_S_12`
`OBUFT_LVCMOS18_S_16`
`OBUFT_LVCMOS18_S_2`
`OBUFT_LVCMOS18_S_4`
`OBUFT_LVCMOS18_S_6`
`OBUFT_LVCMOS18_S_8`
`OBUFT_LVCMOS2`
`OBUFT_LVCMOS25`
`OBUFT_LVCMOS25_F_12`
`OBUFT_LVCMOS25_F_16`
`OBUFT_LVCMOS25_F_2`
`OBUFT_LVCMOS25_F_24`
`OBUFT_LVCMOS25_F_4`
`OBUFT_LVCMOS25_F_6`
`OBUFT_LVCMOS25_F_8`
`OBUFT_LVCMOS25_S_12`
`OBUFT_LVCMOS25_S_16`
`OBUFT_LVCMOS25_S_2`
`OBUFT_LVCMOS25_S_24`
`OBUFT_LVCMOS25_S_4`
`OBUFT_LVCMOS25_S_6`
`OBUFT_LVCMOS25_S_8`
`OBUFT_LVCMOS33`
`OBUFT_LVCMOS33_F_12`
`OBUFT_LVCMOS33_F_16`
`OBUFT_LVCMOS33_F_2`
`OBUFT_LVCMOS33_F_24`
`OBUFT_LVCMOS33_F_4`
`OBUFT_LVCMOS33_F_6`
`OBUFT_LVCMOS33_F_8`
`OBUFT_LVCMOS33_S_12`
`OBUFT_LVCMOS33_S_16`
`OBUFT_LVCMOS33_S_2`
`OBUFT_LVCMOS33_S_24`
`OBUFT_LVCMOS33_S_4`
`OBUFT_LVCMOS33_S_6`
`OBUFT_LVCMOS33_S_8`
`OBUFT_LVDCI_15`
`OBUFT_LVDCI_18`
`OBUFT_LVDCI_25`
`OBUFT_LVDCI_33`
`OBUFT_LVDCI_DV2_15`
`OBUFT_LVDCI_DV2_18`
`OBUFT_LVDCI_DV2_25`
`OBUFT_LVDCI_DV2_33`
`OBUFT_LVDS`
`OBUFT_LVPECL`
`OBUFT_LVTTL`
`OBUFT_LVTTL_F_12`
`OBUFT_LVTTL_F_16`
`OBUFT_LVTTL_F_2`
`OBUFT_LVTTL_F_24`
`OBUFT_LVTTL_F_4`
`OBUFT_LVTTL_F_6`
`OBUFT_LVTTL_F_8`
`OBUFT_LVTTL_S_12`
`OBUFT_LVTTL_S_16`
`OBUFT_LVTTL_S_2`
`OBUFT_LVTTL_S_24`
`OBUFT_LVTTL_S_4`
`OBUFT_LVTTL_S_6`
`OBUFT_LVTTL_S_8`
`OBUFT_ODDR`
`OBUFT_PCI33_3`
`OBUFT_PCI33_5`
`OBUFT_PCI66_3`
`OBUFT_PCIX`
`OBUFT_PCIX66_3`
`OBUFT_S_12`
`OBUFT_S_16`
`OBUFT_S_2`
`OBUFT_S_24`
`OBUFT_S_4`
`OBUFT_S_6`
`OBUFT_S_8`
`OBUFT_SSTL18_I`
`OBUFT_SSTL18_I_DCI`
`OBUFT_SSTL18_II`
`OBUFT_SSTL18_II_DCI`
`OBUFT_SSTL2_I`
`OBUFT_SSTL2_I_DCI`
`OBUFT_SSTL2_II`
`OBUFT_SSTL2_II_DCI`
`OBUFT_SSTL3_I`
`OBUFT_SSTL3_I_DCI`
`OBUFT_SSTL3_II`
`OBUFT_SSTL3_II_DCI`
`OBUFTDS`
`OBUFTDS_BLVDS_25`
`OBUFTDS_COMP`
`OBUFTDS_COMP_ODDR`
`OBUFTDS_DCIEN`
`OBUFTDS_LDT_25`
`OBUFTDS_LVDS_25`
`OBUFTDS_LVDS_33`
`OBUFTDS_LVDSEXT_25`
`OBUFTDS_LVDSEXT_33`
`OBUFTDS_LVPECL_25`
`OBUFTDS_LVPECL_33`
`OBUFTDS_ODDR`
`OBUFTDS_ULVDS_25`
`ODDR`
`ODDR2`
`ODDRE1`
`ODELAYE2`
`ODELAYE2_FINEDELAY`
`ODELAYE3`
`ODELAYE5`
`OR2`
`OR2B1`
`OR2B2`
`OR2L`
`OR3`
`OR3B1`
`OR3B2`
`OR3B3`
`OR4`
`OR4B1`
`OR4B2`
`OR4B3`
`OR4B4`
`OR5`
`OR5B1`
`OR5B2`
`OR5B3`
`OR5B4`
`OR5B5`
`OSERDES`
`OSERDESE1`
`OSERDESE2`
`OSERDESE3`
`OUT_FIFO`
`PCIE_2_1`
`PCIE_3_0`
`PCIE_3_1`
`PCIE40E4`
`PCIE40E5`
`PCIE4CE4`
`PCIE50E5`
`PHASER_IN`
`PHASER_IN_PHY`
`PHASER_OUT`
`PHASER_OUT_PHY`
`PHASER_REF`
`PHY_CONTROL`
`PLL_ADV`
`PLL_BASE`
`PLLE2_ADV`
`PLLE2_BASE`
`PLLE3_ADV`
`PLLE3_BASE`
`PLLE4_ADV`
`PLLE4_BASE`
`PS7`
`PS8`
`PS9`
`PSX`
`PULLDOWN`
`PULLUP`
`PVT_SAS`
`RAM128X1D`
`RAM128X1S`
`RAM128X1S_1`
`RAM16X1D`
`RAM16X1D_1`
`RAM16X1S`
`RAM16X1S_1`
`RAM16X2S`
`RAM16X4S`
`RAM16X8S`
`RAM256X1D`
`RAM256X1S`
`RAM32M`
`RAM32M16`
`RAM32X16DR8`
`RAM32X1D`
`RAM32X1D_1`
`RAM32X1S`
`RAM32X1S_1`
`RAM32X2S`
`RAM32X4S`
`RAM32X8S`
`RAM512X1S`
`RAM64M`
`RAM64M8`
`RAM64X1D`
`RAM64X1D_1`
`RAM64X1S`
`RAM64X1S_1`
`RAM64X2S`
`RAM64X8SW`
`RAMB16`
`RAMB16_S1`
`RAMB16_S1_S1`
`RAMB16_S1_S18`
`RAMB16_S1_S2`
`RAMB16_S1_S36`
`RAMB16_S1_S4`
`RAMB16_S1_S9`
`RAMB16_S18`
`RAMB16_S18_S18`
`RAMB16_S18_S36`
`RAMB16_S2`
`RAMB16_S2_S18`
`RAMB16_S2_S2`
`RAMB16_S2_S36`
`RAMB16_S2_S4`
`RAMB16_S2_S9`
`RAMB16_S36`
`RAMB16_S36_S36`
`RAMB16_S4`
`RAMB16_S4_S18`
`RAMB16_S4_S36`
`RAMB16_S4_S4`
`RAMB16_S4_S9`
`RAMB16_S9`
`RAMB16_S9_S18`
`RAMB16_S9_S36`
`RAMB16_S9_S9`
`RAMB16BWE`
`RAMB16BWE_S18`
`RAMB16BWE_S18_S18`
`RAMB16BWE_S18_S9`
`RAMB16BWE_S36`
`RAMB16BWE_S36_S18`
`RAMB16BWE_S36_S36`
`RAMB16BWE_S36_S9`
`RAMB16BWER`
`RAMB18`
`RAMB18E1`
`RAMB18E2`
`RAMB18E5`
`RAMB18E5_INT`
`RAMB18SDP`
`RAMB36`
`RAMB36E1`
`RAMB36E2`
`RAMB36E5`
`RAMB36E5_INT`
`RAMB36SDP`
`RAMB8BWER`
`RAMD32`
`RAMD32M64`
`RAMD64E`
`RAMD64E5`
`RAMS32`
`RAMS64E`
`RAMS64E1`
`RAMS64E5`
`RFADC`
`RFADC_13B4W_M0`
`RFADC_13B4W_M1`
`RFDAC`
`RIU_OR`
`ROM128X1`
`ROM16X1`
`ROM256X1`
`ROM32X1`
`ROM64X1`
`RX_BITSLICE`
`RXTX_BITSLICE`
`SIM_CONFIGE2`
`SIM_CONFIGE3`
`SRL16`
`SRL16_1`
`SRL16E`
`SRL16E_1`
`SRL32E`
`SRLC16`
`SRLC16_1`
`SRLC16E`
`SRLC16E_1`
`SRLC32E`
`STARTUP_SPARTAN3`
`STARTUP_SPARTAN3A`
`STARTUP_SPARTAN6`
`STARTUP_VIRTEX4`
`STARTUP_VIRTEX5`
`STARTUP_VIRTEX6`
`STARTUPE2`
`STARTUPE3`
`SYSMON`
`SYSMONE1`
`SYSMONE4`
`TEMAC_SINGLE`
`TX_BITSLICE`
`TX_BITSLICE_TRI`
`URAM288`
`URAM288_BASE`
`URAM288E5`
`URAM288E5_BASE`
`USR_ACCESS_VIRTEX4`
`USR_ACCESS_VIRTEX5`
`USR_ACCESS_VIRTEX6`
`USR_ACCESSE2`
`VCC`
`VCU`
`VCU2`
`VDU`
`X5PHIO_CMU_X32`
`X5PHIO_CMUIF`
`X5PHIO_DCCINVBUF`
`X5PHIO_XCVR_X2`
`X5PLL`
`X5PLL_INTF`
`X5PLL_S2P`
`XADC`
`XNOR2`
`XNOR3`
`XNOR4`
`XNOR5`
`XOR2`
`XOR3`
`XOR4`
`XOR5`
`XORCY`
`XORCY_D`
`XORCY_L`
`XPHY`
`XPIO_VREF`
`XPIPE_QUAD`
`XPLL`
`XRAM`
`ZHOLD_DELAY`

Method Summary

All Methods Static Methods Instance Methods Concrete Methods
Modifier and Type	Method and Description
`Unisim[]`	`getTransform(Series s)` Gets the set of unisims the provided unisim transforms to in a given series.
`boolean`	`hasTransform(Series s)` Determines if on given series, if the unisim is transformed to different unisim type(s).
`static Unisim`	`valueOf(String name)` Returns the enum constant of this type with the specified name.
`static Unisim[]`	`values()` Returns an array containing the constants of this enum type, in the order they are declared.

Methods inherited from class Enum
compareTo, equals, getDeclaringClass, hashCode, name, ordinal, toString, valueOf

Methods inherited from class Object
getClass, notify, notifyAll, wait, wait, wait

Enum Constant Detail

AIE_ML_NOC_M_AXI

public static final Unisim AIE_ML_NOC_M_AXI

AIE_ML_NOC_M_AXIS

public static final Unisim AIE_ML_NOC_M_AXIS

AIE_ML_NOC_S_AXI

public static final Unisim AIE_ML_NOC_S_AXI

AIE_ML_NOC_S_AXIS

public static final Unisim AIE_ML_NOC_S_AXIS

AIE_ML_PL_M_AXIS128

public static final Unisim AIE_ML_PL_M_AXIS128

AIE_ML_PL_M_AXIS32

public static final Unisim AIE_ML_PL_M_AXIS32

AIE_ML_PL_M_AXIS64

public static final Unisim AIE_ML_PL_M_AXIS64

AIE_ML_PL_M_EVENTS

public static final Unisim AIE_ML_PL_M_EVENTS

AIE_ML_PL_S_AXIS128

public static final Unisim AIE_ML_PL_S_AXIS128

AIE_ML_PL_S_AXIS32

public static final Unisim AIE_ML_PL_S_AXIS32

AIE_ML_PL_S_AXIS64

public static final Unisim AIE_ML_PL_S_AXIS64

AIE_ML_PL_S_EVENTS

public static final Unisim AIE_ML_PL_S_EVENTS

AIE_NOC_M_AXI

public static final Unisim AIE_NOC_M_AXI

AIE_NOC_M_AXIS

public static final Unisim AIE_NOC_M_AXIS

AIE_NOC_S_AXI

public static final Unisim AIE_NOC_S_AXI

AIE_NOC_S_AXIS

public static final Unisim AIE_NOC_S_AXIS

AIE_PL_M_AXIS128

public static final Unisim AIE_PL_M_AXIS128

AIE_PL_M_AXIS32

public static final Unisim AIE_PL_M_AXIS32

AIE_PL_M_AXIS64

public static final Unisim AIE_PL_M_AXIS64

AIE_PL_M_EVENTS

public static final Unisim AIE_PL_M_EVENTS

AIE_PL_S_AXIS128

public static final Unisim AIE_PL_S_AXIS128

AIE_PL_S_AXIS32

public static final Unisim AIE_PL_S_AXIS32

AIE_PL_S_AXIS64

public static final Unisim AIE_PL_S_AXIS64

AIE_PL_S_EVENTS

public static final Unisim AIE_PL_S_EVENTS

AMS_ADC
```
public static final Unisim AMS_ADC
```

AMS_DAC
```
public static final Unisim AMS_DAC
```

AND2
```
public static final Unisim AND2
```

AND2B1
```
public static final Unisim AND2B1
```

AND2B1L
```
public static final Unisim AND2B1L
```

AND2B2
```
public static final Unisim AND2B2
```

AND3
```
public static final Unisim AND3
```

AND3B1
```
public static final Unisim AND3B1
```

AND3B2
```
public static final Unisim AND3B2
```

AND3B3
```
public static final Unisim AND3B3
```

AND4
```
public static final Unisim AND4
```

AND4B1
```
public static final Unisim AND4B1
```

AND4B2
```
public static final Unisim AND4B2
```

AND4B3
```
public static final Unisim AND4B3
```

AND4B4
```
public static final Unisim AND4B4
```

AND5
```
public static final Unisim AND5
```

AND5B1
```
public static final Unisim AND5B1
```

AND5B2
```
public static final Unisim AND5B2
```

AND5B3
```
public static final Unisim AND5B3
```

AND5B4
```
public static final Unisim AND5B4
```

AND5B5
```
public static final Unisim AND5B5
```

AUTOBUF
```
public static final Unisim AUTOBUF
```

BFR_MATMULX
```
public static final Unisim BFR_MATMULX
```

BIBUF
```
public static final Unisim BIBUF
```

BITSLICE_CONTROL

public static final Unisim BITSLICE_CONTROL

BSCANE2
```
public static final Unisim BSCANE2
```

BSCAN_SPARTAN3

public static final Unisim BSCAN_SPARTAN3

BSCAN_SPARTAN3A

public static final Unisim BSCAN_SPARTAN3A

BSCAN_SPARTAN6

public static final Unisim BSCAN_SPARTAN6

BSCAN_VIRTEX4

public static final Unisim BSCAN_VIRTEX4

BSCAN_VIRTEX5

public static final Unisim BSCAN_VIRTEX5

BSCAN_VIRTEX6

public static final Unisim BSCAN_VIRTEX6

BUF
```
public static final Unisim BUF
```

BUFCE_LEAF
```
public static final Unisim BUFCE_LEAF
```

BUFCE_ROW
```
public static final Unisim BUFCE_ROW
```

BUFDIV_LEAF
```
public static final Unisim BUFDIV_LEAF
```

BUFG
```
public static final Unisim BUFG
```

BUFGCE
```
public static final Unisim BUFGCE
```

BUFGCE_1
```
public static final Unisim BUFGCE_1
```

BUFGCE_DIV
```
public static final Unisim BUFGCE_DIV
```

BUFGCTRL
```
public static final Unisim BUFGCTRL
```

BUFGMUX
```
public static final Unisim BUFGMUX
```

BUFGMUX_1
```
public static final Unisim BUFGMUX_1
```

BUFGMUX_CTRL

public static final Unisim BUFGMUX_CTRL

BUFGMUX_VIRTEX4

public static final Unisim BUFGMUX_VIRTEX4

BUFGP
```
public static final Unisim BUFGP
```

BUFG_FABRIC
```
public static final Unisim BUFG_FABRIC
```

BUFG_GT
```
public static final Unisim BUFG_GT
```

BUFG_GT_SYNC

public static final Unisim BUFG_GT_SYNC

BUFG_HM
```
public static final Unisim BUFG_HM
```

BUFG_LB
```
public static final Unisim BUFG_LB
```

BUFG_PS
```
public static final Unisim BUFG_PS
```

BUFH
```
public static final Unisim BUFH
```

BUFHCE
```
public static final Unisim BUFHCE
```

BUFIO
```
public static final Unisim BUFIO
```

BUFIO2
```
public static final Unisim BUFIO2
```

BUFIODQS
```
public static final Unisim BUFIODQS
```

BUFMR
```
public static final Unisim BUFMR
```

BUFMRCE
```
public static final Unisim BUFMRCE
```

BUFR
```
public static final Unisim BUFR
```

CAPTUREE2
```
public static final Unisim CAPTUREE2
```

CAPTURE_SPARTAN3

public static final Unisim CAPTURE_SPARTAN3

CAPTURE_SPARTAN3A

public static final Unisim CAPTURE_SPARTAN3A

CAPTURE_VIRTEX4

public static final Unisim CAPTURE_VIRTEX4

CAPTURE_VIRTEX5

public static final Unisim CAPTURE_VIRTEX5

CAPTURE_VIRTEX6

public static final Unisim CAPTURE_VIRTEX6

CARRY4
```
public static final Unisim CARRY4
```

CARRY8
```
public static final Unisim CARRY8
```

CFGLUT5
```
public static final Unisim CFGLUT5
```

CLKDLL
```
public static final Unisim CLKDLL
```

CLKDLLE
```
public static final Unisim CLKDLLE
```

CLKDLLHF
```
public static final Unisim CLKDLLHF
```

CLOCK_MOD_CLE_FF

public static final Unisim CLOCK_MOD_CLE_FF

CLOCK_MOD_CLE_IMR

public static final Unisim CLOCK_MOD_CLE_IMR

CLOCK_MOD_IRI_FF

public static final Unisim CLOCK_MOD_IRI_FF

CLOCK_MOD_IRI_IMR

public static final Unisim CLOCK_MOD_IRI_IMR

CMAC
```
public static final Unisim CMAC
```

CMACE4
```
public static final Unisim CMACE4
```

CMPHY_OCTAD
```
public static final Unisim CMPHY_OCTAD
```

CPM
```
public static final Unisim CPM
```

CPM5
```
public static final Unisim CPM5
```

CPM5N
```
public static final Unisim CPM5N
```

CPM_EXT
```
public static final Unisim CPM_EXT
```

CPM_MAIN
```
public static final Unisim CPM_MAIN
```

DCIRESET
```
public static final Unisim DCIRESET
```

DCM
```
public static final Unisim DCM
```

DCMAC
```
public static final Unisim DCMAC
```

DCM_ADV
```
public static final Unisim DCM_ADV
```

DCM_BASE
```
public static final Unisim DCM_BASE
```

DCM_PS
```
public static final Unisim DCM_PS
```

DCM_SP
```
public static final Unisim DCM_SP
```

DDRMC
```
public static final Unisim DDRMC
```

DDRMC5
```
public static final Unisim DDRMC5
```

DDRMC5C
```
public static final Unisim DDRMC5C
```

DDRMC_RIU
```
public static final Unisim DDRMC_RIU
```

DFE_CFR
```
public static final Unisim DFE_CFR
```

DFE_DUC_DDC
```
public static final Unisim DFE_DUC_DDC
```

DFE_FFT
```
public static final Unisim DFE_FFT
```

DFE_FIR
```
public static final Unisim DFE_FIR
```

DFE_MATRIX_FIR

public static final Unisim DFE_MATRIX_FIR

DFE_NL_FIR
```
public static final Unisim DFE_NL_FIR
```

DFE_PQ_DECIM

public static final Unisim DFE_PQ_DECIM

DFE_PQ_INTERP

public static final Unisim DFE_PQ_INTERP

DFE_PRACH
```
public static final Unisim DFE_PRACH
```

DIFFINBUF
```
public static final Unisim DIFFINBUF
```

DNA_PORT
```
public static final Unisim DNA_PORT
```

DNA_PORTE2
```
public static final Unisim DNA_PORTE2
```

DPHY_DIFFINBUF

public static final Unisim DPHY_DIFFINBUF

DPLL
```
public static final Unisim DPLL
```

DSP48
```
public static final Unisim DSP48
```

DSP48A
```
public static final Unisim DSP48A
```

DSP48A1
```
public static final Unisim DSP48A1
```

DSP48E
```
public static final Unisim DSP48E
```

DSP48E1
```
public static final Unisim DSP48E1
```

DSP48E2
```
public static final Unisim DSP48E2
```

DSP48E5
```
public static final Unisim DSP48E5
```

DSP58
```
public static final Unisim DSP58
```

DSP58C
```
public static final Unisim DSP58C
```

DSPCPLX
```
public static final Unisim DSPCPLX
```

DSPFP32
```
public static final Unisim DSPFP32
```

DSP_ALU
```
public static final Unisim DSP_ALU
```

DSP_ALUADD
```
public static final Unisim DSP_ALUADD
```

DSP_ALUMUX
```
public static final Unisim DSP_ALUMUX
```

DSP_ALUREG
```
public static final Unisim DSP_ALUREG
```

DSP_A_B_DATA

public static final Unisim DSP_A_B_DATA

DSP_A_B_DATA58

public static final Unisim DSP_A_B_DATA58

DSP_CPLX_STAGE0

public static final Unisim DSP_CPLX_STAGE0

DSP_CPLX_STAGE1

public static final Unisim DSP_CPLX_STAGE1

DSP_C_DATA
```
public static final Unisim DSP_C_DATA
```

DSP_C_DATA58

public static final Unisim DSP_C_DATA58

DSP_FPA_CREG

public static final Unisim DSP_FPA_CREG

DSP_FPA_OPM_REG

public static final Unisim DSP_FPA_OPM_REG

DSP_FPM_PIPEREG

public static final Unisim DSP_FPM_PIPEREG

DSP_FPM_STAGE0

public static final Unisim DSP_FPM_STAGE0

DSP_FPM_STAGE1

public static final Unisim DSP_FPM_STAGE1

DSP_FP_ADDER

public static final Unisim DSP_FP_ADDER

DSP_FP_INMUX

public static final Unisim DSP_FP_INMUX

DSP_FP_INREG

public static final Unisim DSP_FP_INREG

DSP_FP_OUTPUT

public static final Unisim DSP_FP_OUTPUT

DSP_FP_SRCMX_OPTINV

public static final Unisim DSP_FP_SRCMX_OPTINV

DSP_MULTIPLIER

public static final Unisim DSP_MULTIPLIER

DSP_MULTIPLIER58

public static final Unisim DSP_MULTIPLIER58

DSP_M_DATA
```
public static final Unisim DSP_M_DATA
```

DSP_M_DATA58

public static final Unisim DSP_M_DATA58

DSP_OUTPUT
```
public static final Unisim DSP_OUTPUT
```

DSP_OUTPUT58

public static final Unisim DSP_OUTPUT58

DSP_PATDET
```
public static final Unisim DSP_PATDET
```

DSP_PREADD
```
public static final Unisim DSP_PREADD
```

DSP_PREADD58

public static final Unisim DSP_PREADD58

DSP_PREADD_DATA

public static final Unisim DSP_PREADD_DATA

DSP_PREADD_DATA58

public static final Unisim DSP_PREADD_DATA58

DSP_SRCMX_OPTINV

public static final Unisim DSP_SRCMX_OPTINV

EFUSE_USR
```
public static final Unisim EFUSE_USR
```

FD
```
public static final Unisim FD
```

FDC
```
public static final Unisim FDC
```

FDCE
```
public static final Unisim FDCE
```

FDCE_1
```
public static final Unisim FDCE_1
```

FDCP
```
public static final Unisim FDCP
```

FDCPE
```
public static final Unisim FDCPE
```

FDCPE_1
```
public static final Unisim FDCPE_1
```

FDCP_1
```
public static final Unisim FDCP_1
```

FDC_1
```
public static final Unisim FDC_1
```

FDE
```
public static final Unisim FDE
```

FDE_1
```
public static final Unisim FDE_1
```

FDP
```
public static final Unisim FDP
```

FDPE
```
public static final Unisim FDPE
```

FDPE_1
```
public static final Unisim FDPE_1
```

FDP_1
```
public static final Unisim FDP_1
```

FDR
```
public static final Unisim FDR
```

FDRE
```
public static final Unisim FDRE
```

FDRE_1
```
public static final Unisim FDRE_1
```

FDRS
```
public static final Unisim FDRS
```

FDRSE
```
public static final Unisim FDRSE
```

FDRSE_1
```
public static final Unisim FDRSE_1
```

FDRS_1
```
public static final Unisim FDRS_1
```

FDR_1
```
public static final Unisim FDR_1
```

FDS
```
public static final Unisim FDS
```

FDSE
```
public static final Unisim FDSE
```

FDSE_1
```
public static final Unisim FDSE_1
```

FDS_1
```
public static final Unisim FDS_1
```

FD_1
```
public static final Unisim FD_1
```

FE
```
public static final Unisim FE
```

FIFO16
```
public static final Unisim FIFO16
```

FIFO18
```
public static final Unisim FIFO18
```

FIFO18E1
```
public static final Unisim FIFO18E1
```

FIFO18E2
```
public static final Unisim FIFO18E2
```

FIFO18_36
```
public static final Unisim FIFO18_36
```

FIFO36
```
public static final Unisim FIFO36
```

FIFO36E1
```
public static final Unisim FIFO36E1
```

FIFO36E2
```
public static final Unisim FIFO36E2
```

FIFO36_72
```
public static final Unisim FIFO36_72
```

FRAME_ECCE2
```
public static final Unisim FRAME_ECCE2
```

FRAME_ECCE3
```
public static final Unisim FRAME_ECCE3
```

FRAME_ECCE4
```
public static final Unisim FRAME_ECCE4
```

FRAME_ECC_VIRTEX6

public static final Unisim FRAME_ECC_VIRTEX6

GND
```
public static final Unisim GND
```

GTF_CHANNEL
```
public static final Unisim GTF_CHANNEL
```

GTF_COMMON
```
public static final Unisim GTF_COMMON
```

GTHE2_CHANNEL

public static final Unisim GTHE2_CHANNEL

GTHE2_COMMON

public static final Unisim GTHE2_COMMON

GTHE3_CHANNEL

public static final Unisim GTHE3_CHANNEL

GTHE3_COMMON

public static final Unisim GTHE3_COMMON

GTHE4_CHANNEL

public static final Unisim GTHE4_CHANNEL

GTHE4_COMMON

public static final Unisim GTHE4_COMMON

GTME5_QUAD
```
public static final Unisim GTME5_QUAD
```

GTM_DUAL
```
public static final Unisim GTM_DUAL
```

GTPA1_DUAL
```
public static final Unisim GTPA1_DUAL
```

GTPE2_CHANNEL

public static final Unisim GTPE2_CHANNEL

GTPE2_COMMON

public static final Unisim GTPE2_COMMON

GTXE1
```
public static final Unisim GTXE1
```

GTXE2_CHANNEL

public static final Unisim GTXE2_CHANNEL

GTXE2_COMMON

public static final Unisim GTXE2_COMMON

GTYE3_CHANNEL

public static final Unisim GTYE3_CHANNEL

GTYE3_COMMON

public static final Unisim GTYE3_COMMON

GTYE4_CHANNEL

public static final Unisim GTYE4_CHANNEL

GTYE4_COMMON

public static final Unisim GTYE4_COMMON

GTYE5_QUAD
```
public static final Unisim GTYE5_QUAD
```

GTYP_QUAD
```
public static final Unisim GTYP_QUAD
```

HARD_INV
```
public static final Unisim HARD_INV
```

HARD_SYNC
```
public static final Unisim HARD_SYNC
```

HBM_IO_CHNL
```
public static final Unisim HBM_IO_CHNL
```

HBM_IO_MS
```
public static final Unisim HBM_IO_MS
```

HBM_MC
```
public static final Unisim HBM_MC
```

HBM_ONE_STACK_INTF

public static final Unisim HBM_ONE_STACK_INTF

HBM_PHY_CHNL

public static final Unisim HBM_PHY_CHNL

HBM_PHY_MS
```
public static final Unisim HBM_PHY_MS
```

HBM_REF_CLK
```
public static final Unisim HBM_REF_CLK
```

HBM_SNGLBLI_INTF_APB

public static final Unisim HBM_SNGLBLI_INTF_APB

HBM_SNGLBLI_INTF_AXI

public static final Unisim HBM_SNGLBLI_INTF_AXI

HBM_TWO_STACK_INTF

public static final Unisim HBM_TWO_STACK_INTF

HNICPIPE_QUAD

public static final Unisim HNICPIPE_QUAD

HNICX
```
public static final Unisim HNICX
```

HPIO_VREF
```
public static final Unisim HPIO_VREF
```

HPLL
```
public static final Unisim HPLL
```

HSADC
```
public static final Unisim HSADC
```

HSDAC
```
public static final Unisim HSDAC
```

IBUF
```
public static final Unisim IBUF
```

IBUFCTRL
```
public static final Unisim IBUFCTRL
```

IBUFDS
```
public static final Unisim IBUFDS
```

IBUFDSE3
```
public static final Unisim IBUFDSE3
```

IBUFDS_BLVDS_25

public static final Unisim IBUFDS_BLVDS_25

IBUFDS_DIFF_OUT

public static final Unisim IBUFDS_DIFF_OUT

IBUFDS_DIFF_OUT_IBUFDISABLE

public static final Unisim IBUFDS_DIFF_OUT_IBUFDISABLE

IBUFDS_DIFF_OUT_INTERMDISABLE

public static final Unisim IBUFDS_DIFF_OUT_INTERMDISABLE

IBUFDS_DPHY
```
public static final Unisim IBUFDS_DPHY
```

IBUFDS_GTE2
```
public static final Unisim IBUFDS_GTE2
```

IBUFDS_GTE3
```
public static final Unisim IBUFDS_GTE3
```

IBUFDS_GTE4
```
public static final Unisim IBUFDS_GTE4
```

IBUFDS_GTE5
```
public static final Unisim IBUFDS_GTE5
```

IBUFDS_GTM
```
public static final Unisim IBUFDS_GTM
```

IBUFDS_GTME5

public static final Unisim IBUFDS_GTME5

IBUFDS_GTXE1

public static final Unisim IBUFDS_GTXE1

IBUFDS_IBUFDISABLE

public static final Unisim IBUFDS_IBUFDISABLE

IBUFDS_IBUFDISABLE_INT

public static final Unisim IBUFDS_IBUFDISABLE_INT

IBUFDS_INTERMDISABLE

public static final Unisim IBUFDS_INTERMDISABLE

IBUFDS_INTERMDISABLE_INT

public static final Unisim IBUFDS_INTERMDISABLE_INT

IBUFDS_LDT_25

public static final Unisim IBUFDS_LDT_25

IBUFDS_LVDSEXT_25

public static final Unisim IBUFDS_LVDSEXT_25

IBUFDS_LVDSEXT_25_DCI

public static final Unisim IBUFDS_LVDSEXT_25_DCI

IBUFDS_LVDSEXT_33

public static final Unisim IBUFDS_LVDSEXT_33

IBUFDS_LVDSEXT_33_DCI

public static final Unisim IBUFDS_LVDSEXT_33_DCI

IBUFDS_LVDS_25

public static final Unisim IBUFDS_LVDS_25

IBUFDS_LVDS_25_DCI

public static final Unisim IBUFDS_LVDS_25_DCI

IBUFDS_LVDS_33

public static final Unisim IBUFDS_LVDS_33

IBUFDS_LVDS_33_DCI

public static final Unisim IBUFDS_LVDS_33_DCI

IBUFDS_LVPECL_25

public static final Unisim IBUFDS_LVPECL_25

IBUFDS_LVPECL_33

public static final Unisim IBUFDS_LVPECL_33

IBUFDS_ULVDS_25

public static final Unisim IBUFDS_ULVDS_25

IBUFE3
```
public static final Unisim IBUFE3
```

IBUFG
```
public static final Unisim IBUFG
```

IBUFGDS
```
public static final Unisim IBUFGDS
```

IBUFGDS_BLVDS_25

public static final Unisim IBUFGDS_BLVDS_25

IBUFGDS_DIFF_OUT

public static final Unisim IBUFGDS_DIFF_OUT

IBUFGDS_LDT_25

public static final Unisim IBUFGDS_LDT_25

IBUFGDS_LVDSEXT_25

public static final Unisim IBUFGDS_LVDSEXT_25

IBUFGDS_LVDSEXT_25_DCI

public static final Unisim IBUFGDS_LVDSEXT_25_DCI

IBUFGDS_LVDSEXT_33

public static final Unisim IBUFGDS_LVDSEXT_33

IBUFGDS_LVDSEXT_33_DCI

public static final Unisim IBUFGDS_LVDSEXT_33_DCI

IBUFGDS_LVDS_25

public static final Unisim IBUFGDS_LVDS_25

IBUFGDS_LVDS_25_DCI

public static final Unisim IBUFGDS_LVDS_25_DCI

IBUFGDS_LVDS_33

public static final Unisim IBUFGDS_LVDS_33

IBUFGDS_LVDS_33_DCI

public static final Unisim IBUFGDS_LVDS_33_DCI

IBUFGDS_LVPECL_25

public static final Unisim IBUFGDS_LVPECL_25

IBUFGDS_LVPECL_33

public static final Unisim IBUFGDS_LVPECL_33

IBUFGDS_ULVDS_25

public static final Unisim IBUFGDS_ULVDS_25

IBUFG_AGP
```
public static final Unisim IBUFG_AGP
```

IBUFG_CTT
```
public static final Unisim IBUFG_CTT
```

IBUFG_GTL
```
public static final Unisim IBUFG_GTL
```

IBUFG_GTLP
```
public static final Unisim IBUFG_GTLP
```

IBUFG_GTLP_DCI

public static final Unisim IBUFG_GTLP_DCI

IBUFG_GTL_DCI

public static final Unisim IBUFG_GTL_DCI

IBUFG_HSTL_I

public static final Unisim IBUFG_HSTL_I

IBUFG_HSTL_II

public static final Unisim IBUFG_HSTL_II

IBUFG_HSTL_III

public static final Unisim IBUFG_HSTL_III

IBUFG_HSTL_III_18

public static final Unisim IBUFG_HSTL_III_18

IBUFG_HSTL_III_DCI

public static final Unisim IBUFG_HSTL_III_DCI

IBUFG_HSTL_III_DCI_18

public static final Unisim IBUFG_HSTL_III_DCI_18

IBUFG_HSTL_II_18

public static final Unisim IBUFG_HSTL_II_18

IBUFG_HSTL_II_DCI

public static final Unisim IBUFG_HSTL_II_DCI

IBUFG_HSTL_II_DCI_18

public static final Unisim IBUFG_HSTL_II_DCI_18

IBUFG_HSTL_IV

public static final Unisim IBUFG_HSTL_IV

IBUFG_HSTL_IV_18

public static final Unisim IBUFG_HSTL_IV_18

IBUFG_HSTL_IV_DCI

public static final Unisim IBUFG_HSTL_IV_DCI

IBUFG_HSTL_IV_DCI_18

public static final Unisim IBUFG_HSTL_IV_DCI_18

IBUFG_HSTL_I_18

public static final Unisim IBUFG_HSTL_I_18

IBUFG_HSTL_I_DCI

public static final Unisim IBUFG_HSTL_I_DCI

IBUFG_HSTL_I_DCI_18

public static final Unisim IBUFG_HSTL_I_DCI_18

IBUFG_LVCMOS12

public static final Unisim IBUFG_LVCMOS12

IBUFG_LVCMOS15

public static final Unisim IBUFG_LVCMOS15

IBUFG_LVCMOS18

public static final Unisim IBUFG_LVCMOS18

IBUFG_LVCMOS2

public static final Unisim IBUFG_LVCMOS2

IBUFG_LVCMOS25

public static final Unisim IBUFG_LVCMOS25

IBUFG_LVCMOS33

public static final Unisim IBUFG_LVCMOS33

IBUFG_LVDCI_15

public static final Unisim IBUFG_LVDCI_15

IBUFG_LVDCI_18

public static final Unisim IBUFG_LVDCI_18

IBUFG_LVDCI_25

public static final Unisim IBUFG_LVDCI_25

IBUFG_LVDCI_33

public static final Unisim IBUFG_LVDCI_33

IBUFG_LVDCI_DV2_15

public static final Unisim IBUFG_LVDCI_DV2_15

IBUFG_LVDCI_DV2_18

public static final Unisim IBUFG_LVDCI_DV2_18

IBUFG_LVDCI_DV2_25

public static final Unisim IBUFG_LVDCI_DV2_25

IBUFG_LVDCI_DV2_33

public static final Unisim IBUFG_LVDCI_DV2_33

IBUFG_LVDS
```
public static final Unisim IBUFG_LVDS
```

IBUFG_LVPECL

public static final Unisim IBUFG_LVPECL

IBUFG_LVTTL
```
public static final Unisim IBUFG_LVTTL
```

IBUFG_PCI33_3

public static final Unisim IBUFG_PCI33_3

IBUFG_PCI33_5

public static final Unisim IBUFG_PCI33_5

IBUFG_PCI66_3

public static final Unisim IBUFG_PCI66_3

IBUFG_PCIX
```
public static final Unisim IBUFG_PCIX
```

IBUFG_PCIX66_3

public static final Unisim IBUFG_PCIX66_3

IBUFG_SSTL18_I

public static final Unisim IBUFG_SSTL18_I

IBUFG_SSTL18_II

public static final Unisim IBUFG_SSTL18_II

IBUFG_SSTL18_II_DCI

public static final Unisim IBUFG_SSTL18_II_DCI

IBUFG_SSTL18_I_DCI

public static final Unisim IBUFG_SSTL18_I_DCI

IBUFG_SSTL2_I

public static final Unisim IBUFG_SSTL2_I

IBUFG_SSTL2_II

public static final Unisim IBUFG_SSTL2_II

IBUFG_SSTL2_II_DCI

public static final Unisim IBUFG_SSTL2_II_DCI

IBUFG_SSTL2_I_DCI

public static final Unisim IBUFG_SSTL2_I_DCI

IBUFG_SSTL3_I

public static final Unisim IBUFG_SSTL3_I

IBUFG_SSTL3_II

public static final Unisim IBUFG_SSTL3_II

IBUFG_SSTL3_II_DCI

public static final Unisim IBUFG_SSTL3_II_DCI

IBUFG_SSTL3_I_DCI

public static final Unisim IBUFG_SSTL3_I_DCI

IBUF_AGP
```
public static final Unisim IBUF_AGP
```

IBUF_ANALOG
```
public static final Unisim IBUF_ANALOG
```

IBUF_CTT
```
public static final Unisim IBUF_CTT
```

IBUF_GTL
```
public static final Unisim IBUF_GTL
```

IBUF_GTLP
```
public static final Unisim IBUF_GTLP
```

IBUF_GTLP_DCI

public static final Unisim IBUF_GTLP_DCI

IBUF_GTL_DCI

public static final Unisim IBUF_GTL_DCI

IBUF_HSTL_I
```
public static final Unisim IBUF_HSTL_I
```

IBUF_HSTL_II

public static final Unisim IBUF_HSTL_II

IBUF_HSTL_III

public static final Unisim IBUF_HSTL_III

IBUF_HSTL_III_18

public static final Unisim IBUF_HSTL_III_18

IBUF_HSTL_III_DCI

public static final Unisim IBUF_HSTL_III_DCI

IBUF_HSTL_III_DCI_18

public static final Unisim IBUF_HSTL_III_DCI_18

IBUF_HSTL_II_18

public static final Unisim IBUF_HSTL_II_18

IBUF_HSTL_II_DCI

public static final Unisim IBUF_HSTL_II_DCI

IBUF_HSTL_II_DCI_18

public static final Unisim IBUF_HSTL_II_DCI_18

IBUF_HSTL_IV

public static final Unisim IBUF_HSTL_IV

IBUF_HSTL_IV_18

public static final Unisim IBUF_HSTL_IV_18

IBUF_HSTL_IV_DCI

public static final Unisim IBUF_HSTL_IV_DCI

IBUF_HSTL_IV_DCI_18

public static final Unisim IBUF_HSTL_IV_DCI_18

IBUF_HSTL_I_18

public static final Unisim IBUF_HSTL_I_18

IBUF_HSTL_I_DCI

public static final Unisim IBUF_HSTL_I_DCI

IBUF_HSTL_I_DCI_18

public static final Unisim IBUF_HSTL_I_DCI_18

IBUF_IBUFDISABLE

public static final Unisim IBUF_IBUFDISABLE

IBUF_INTERMDISABLE

public static final Unisim IBUF_INTERMDISABLE

IBUF_LVCMOS12

public static final Unisim IBUF_LVCMOS12

IBUF_LVCMOS15

public static final Unisim IBUF_LVCMOS15

IBUF_LVCMOS18

public static final Unisim IBUF_LVCMOS18

IBUF_LVCMOS2

public static final Unisim IBUF_LVCMOS2

IBUF_LVCMOS25

public static final Unisim IBUF_LVCMOS25

IBUF_LVCMOS33

public static final Unisim IBUF_LVCMOS33

IBUF_LVDCI_15

public static final Unisim IBUF_LVDCI_15

IBUF_LVDCI_18

public static final Unisim IBUF_LVDCI_18

IBUF_LVDCI_25

public static final Unisim IBUF_LVDCI_25

IBUF_LVDCI_33

public static final Unisim IBUF_LVDCI_33

IBUF_LVDCI_DV2_15

public static final Unisim IBUF_LVDCI_DV2_15

IBUF_LVDCI_DV2_18

public static final Unisim IBUF_LVDCI_DV2_18

IBUF_LVDCI_DV2_25

public static final Unisim IBUF_LVDCI_DV2_25

IBUF_LVDCI_DV2_33

public static final Unisim IBUF_LVDCI_DV2_33

IBUF_LVDS
```
public static final Unisim IBUF_LVDS
```

IBUF_LVPECL
```
public static final Unisim IBUF_LVPECL
```

IBUF_LVTTL
```
public static final Unisim IBUF_LVTTL
```

IBUF_PCI33_3

public static final Unisim IBUF_PCI33_3

IBUF_PCI33_5

public static final Unisim IBUF_PCI33_5

IBUF_PCI66_3

public static final Unisim IBUF_PCI66_3

IBUF_PCIX
```
public static final Unisim IBUF_PCIX
```

IBUF_PCIX66_3

public static final Unisim IBUF_PCIX66_3

IBUF_SSTL18_I

public static final Unisim IBUF_SSTL18_I

IBUF_SSTL18_II

public static final Unisim IBUF_SSTL18_II

IBUF_SSTL18_II_DCI

public static final Unisim IBUF_SSTL18_II_DCI

IBUF_SSTL18_I_DCI

public static final Unisim IBUF_SSTL18_I_DCI

IBUF_SSTL2_I

public static final Unisim IBUF_SSTL2_I

IBUF_SSTL2_II

public static final Unisim IBUF_SSTL2_II

IBUF_SSTL2_II_DCI

public static final Unisim IBUF_SSTL2_II_DCI

IBUF_SSTL2_I_DCI

public static final Unisim IBUF_SSTL2_I_DCI

IBUF_SSTL3_I

public static final Unisim IBUF_SSTL3_I

IBUF_SSTL3_II

public static final Unisim IBUF_SSTL3_II

IBUF_SSTL3_II_DCI

public static final Unisim IBUF_SSTL3_II_DCI

IBUF_SSTL3_I_DCI

public static final Unisim IBUF_SSTL3_I_DCI

ICAPE2
```
public static final Unisim ICAPE2
```

ICAPE3
```
public static final Unisim ICAPE3
```

ICAP_SPARTAN3A

public static final Unisim ICAP_SPARTAN3A

ICAP_SPARTAN6

public static final Unisim ICAP_SPARTAN6

ICAP_VIRTEX4

public static final Unisim ICAP_VIRTEX4

ICAP_VIRTEX5

public static final Unisim ICAP_VIRTEX5

ICAP_VIRTEX6

public static final Unisim ICAP_VIRTEX6

IDDR
```
public static final Unisim IDDR
```

IDDR2
```
public static final Unisim IDDR2
```

IDDRE1
```
public static final Unisim IDDRE1
```

IDDR_2CLK
```
public static final Unisim IDDR_2CLK
```

IDELAY
```
public static final Unisim IDELAY
```

IDELAYCTRL
```
public static final Unisim IDELAYCTRL
```

IDELAYE2
```
public static final Unisim IDELAYE2
```

IDELAYE2_FINEDELAY

public static final Unisim IDELAYE2_FINEDELAY

IDELAYE3
```
public static final Unisim IDELAYE3
```

IDELAYE5
```
public static final Unisim IDELAYE5
```

ILKN
```
public static final Unisim ILKN
```

ILKNE4
```
public static final Unisim ILKNE4
```

ILKNF
```
public static final Unisim ILKNF
```

IMC_FF
```
public static final Unisim IMC_FF
```

IMI_FF
```
public static final Unisim IMI_FF
```

INBUF
```
public static final Unisim INBUF
```

INV
```
public static final Unisim INV
```

IN_FIFO
```
public static final Unisim IN_FIFO
```

IOBUF
```
public static final Unisim IOBUF
```

IOBUFDS
```
public static final Unisim IOBUFDS
```

IOBUFDSE3
```
public static final Unisim IOBUFDSE3
```

IOBUFDS_BLVDS_25

public static final Unisim IOBUFDS_BLVDS_25

IOBUFDS_COMP

public static final Unisim IOBUFDS_COMP

IOBUFDS_COMP_ODDR

public static final Unisim IOBUFDS_COMP_ODDR

IOBUFDS_DCIEN

public static final Unisim IOBUFDS_DCIEN

IOBUFDS_DIFF_OUT

public static final Unisim IOBUFDS_DIFF_OUT

IOBUFDS_DIFF_OUT_DCIEN

public static final Unisim IOBUFDS_DIFF_OUT_DCIEN

IOBUFDS_DIFF_OUT_INTERMDISABLE

public static final Unisim IOBUFDS_DIFF_OUT_INTERMDISABLE

IOBUFDS_DIFF_OUT_INTERMDISABLE_ODDR

public static final Unisim IOBUFDS_DIFF_OUT_INTERMDISABLE_ODDR

IOBUFDS_DIFF_OUT_ODDR

public static final Unisim IOBUFDS_DIFF_OUT_ODDR

IOBUFDS_INTERMDISABLE

public static final Unisim IOBUFDS_INTERMDISABLE

IOBUFDS_INTERMDISABLE_ODDR

public static final Unisim IOBUFDS_INTERMDISABLE_ODDR

IOBUFDS_ODDR

public static final Unisim IOBUFDS_ODDR

IOBUFE3
```
public static final Unisim IOBUFE3
```

IOBUF_AGP
```
public static final Unisim IOBUF_AGP
```

IOBUF_ANALOG

public static final Unisim IOBUF_ANALOG

IOBUF_CTT
```
public static final Unisim IOBUF_CTT
```

IOBUF_DCIEN
```
public static final Unisim IOBUF_DCIEN
```

IOBUF_F_12
```
public static final Unisim IOBUF_F_12
```

IOBUF_F_16
```
public static final Unisim IOBUF_F_16
```

IOBUF_F_2
```
public static final Unisim IOBUF_F_2
```

IOBUF_F_24
```
public static final Unisim IOBUF_F_24
```

IOBUF_F_4
```
public static final Unisim IOBUF_F_4
```

IOBUF_F_6
```
public static final Unisim IOBUF_F_6
```

IOBUF_F_8
```
public static final Unisim IOBUF_F_8
```

IOBUF_GTL
```
public static final Unisim IOBUF_GTL
```

IOBUF_GTLP
```
public static final Unisim IOBUF_GTLP
```

IOBUF_GTLP_DCI

public static final Unisim IOBUF_GTLP_DCI

IOBUF_GTL_DCI

public static final Unisim IOBUF_GTL_DCI

IOBUF_HSTL_I

public static final Unisim IOBUF_HSTL_I

IOBUF_HSTL_II

public static final Unisim IOBUF_HSTL_II

IOBUF_HSTL_III

public static final Unisim IOBUF_HSTL_III

IOBUF_HSTL_III_18

public static final Unisim IOBUF_HSTL_III_18

IOBUF_HSTL_II_18

public static final Unisim IOBUF_HSTL_II_18

IOBUF_HSTL_II_DCI

public static final Unisim IOBUF_HSTL_II_DCI

IOBUF_HSTL_II_DCI_18

public static final Unisim IOBUF_HSTL_II_DCI_18

IOBUF_HSTL_IV

public static final Unisim IOBUF_HSTL_IV

IOBUF_HSTL_IV_18

public static final Unisim IOBUF_HSTL_IV_18

IOBUF_HSTL_IV_DCI

public static final Unisim IOBUF_HSTL_IV_DCI

IOBUF_HSTL_IV_DCI_18

public static final Unisim IOBUF_HSTL_IV_DCI_18

IOBUF_HSTL_I_18

public static final Unisim IOBUF_HSTL_I_18

IOBUF_INTERMDISABLE

public static final Unisim IOBUF_INTERMDISABLE

IOBUF_LVCMOS12

public static final Unisim IOBUF_LVCMOS12

IOBUF_LVCMOS12_F_2

public static final Unisim IOBUF_LVCMOS12_F_2

IOBUF_LVCMOS12_F_4

public static final Unisim IOBUF_LVCMOS12_F_4

IOBUF_LVCMOS12_F_6

public static final Unisim IOBUF_LVCMOS12_F_6

IOBUF_LVCMOS12_F_8

public static final Unisim IOBUF_LVCMOS12_F_8

IOBUF_LVCMOS12_S_2

public static final Unisim IOBUF_LVCMOS12_S_2

IOBUF_LVCMOS12_S_4

public static final Unisim IOBUF_LVCMOS12_S_4

IOBUF_LVCMOS12_S_6

public static final Unisim IOBUF_LVCMOS12_S_6

IOBUF_LVCMOS12_S_8

public static final Unisim IOBUF_LVCMOS12_S_8

IOBUF_LVCMOS15

public static final Unisim IOBUF_LVCMOS15

IOBUF_LVCMOS15_F_12

public static final Unisim IOBUF_LVCMOS15_F_12

IOBUF_LVCMOS15_F_16

public static final Unisim IOBUF_LVCMOS15_F_16

IOBUF_LVCMOS15_F_2

public static final Unisim IOBUF_LVCMOS15_F_2

IOBUF_LVCMOS15_F_4

public static final Unisim IOBUF_LVCMOS15_F_4

IOBUF_LVCMOS15_F_6

public static final Unisim IOBUF_LVCMOS15_F_6

IOBUF_LVCMOS15_F_8

public static final Unisim IOBUF_LVCMOS15_F_8

IOBUF_LVCMOS15_S_12

public static final Unisim IOBUF_LVCMOS15_S_12

IOBUF_LVCMOS15_S_16

public static final Unisim IOBUF_LVCMOS15_S_16

IOBUF_LVCMOS15_S_2

public static final Unisim IOBUF_LVCMOS15_S_2

IOBUF_LVCMOS15_S_4

public static final Unisim IOBUF_LVCMOS15_S_4

IOBUF_LVCMOS15_S_6

public static final Unisim IOBUF_LVCMOS15_S_6

IOBUF_LVCMOS15_S_8

public static final Unisim IOBUF_LVCMOS15_S_8

IOBUF_LVCMOS18

public static final Unisim IOBUF_LVCMOS18

IOBUF_LVCMOS18_F_12

public static final Unisim IOBUF_LVCMOS18_F_12

IOBUF_LVCMOS18_F_16

public static final Unisim IOBUF_LVCMOS18_F_16

IOBUF_LVCMOS18_F_2

public static final Unisim IOBUF_LVCMOS18_F_2

IOBUF_LVCMOS18_F_4

public static final Unisim IOBUF_LVCMOS18_F_4

IOBUF_LVCMOS18_F_6

public static final Unisim IOBUF_LVCMOS18_F_6

IOBUF_LVCMOS18_F_8

public static final Unisim IOBUF_LVCMOS18_F_8

IOBUF_LVCMOS18_S_12

public static final Unisim IOBUF_LVCMOS18_S_12

IOBUF_LVCMOS18_S_16

public static final Unisim IOBUF_LVCMOS18_S_16

IOBUF_LVCMOS18_S_2

public static final Unisim IOBUF_LVCMOS18_S_2

IOBUF_LVCMOS18_S_4

public static final Unisim IOBUF_LVCMOS18_S_4

IOBUF_LVCMOS18_S_6

public static final Unisim IOBUF_LVCMOS18_S_6

IOBUF_LVCMOS18_S_8

public static final Unisim IOBUF_LVCMOS18_S_8

IOBUF_LVCMOS2

public static final Unisim IOBUF_LVCMOS2

IOBUF_LVCMOS25

public static final Unisim IOBUF_LVCMOS25

IOBUF_LVCMOS25_F_12

public static final Unisim IOBUF_LVCMOS25_F_12

IOBUF_LVCMOS25_F_16

public static final Unisim IOBUF_LVCMOS25_F_16

IOBUF_LVCMOS25_F_2

public static final Unisim IOBUF_LVCMOS25_F_2

IOBUF_LVCMOS25_F_24

public static final Unisim IOBUF_LVCMOS25_F_24

IOBUF_LVCMOS25_F_4

public static final Unisim IOBUF_LVCMOS25_F_4

IOBUF_LVCMOS25_F_6

public static final Unisim IOBUF_LVCMOS25_F_6

IOBUF_LVCMOS25_F_8

public static final Unisim IOBUF_LVCMOS25_F_8

IOBUF_LVCMOS25_S_12

public static final Unisim IOBUF_LVCMOS25_S_12

IOBUF_LVCMOS25_S_16

public static final Unisim IOBUF_LVCMOS25_S_16

IOBUF_LVCMOS25_S_2

public static final Unisim IOBUF_LVCMOS25_S_2

IOBUF_LVCMOS25_S_24

public static final Unisim IOBUF_LVCMOS25_S_24

IOBUF_LVCMOS25_S_4

public static final Unisim IOBUF_LVCMOS25_S_4

IOBUF_LVCMOS25_S_6

public static final Unisim IOBUF_LVCMOS25_S_6

IOBUF_LVCMOS25_S_8

public static final Unisim IOBUF_LVCMOS25_S_8

IOBUF_LVCMOS33

public static final Unisim IOBUF_LVCMOS33

IOBUF_LVCMOS33_F_12

public static final Unisim IOBUF_LVCMOS33_F_12

IOBUF_LVCMOS33_F_16

public static final Unisim IOBUF_LVCMOS33_F_16

IOBUF_LVCMOS33_F_2

public static final Unisim IOBUF_LVCMOS33_F_2

IOBUF_LVCMOS33_F_24

public static final Unisim IOBUF_LVCMOS33_F_24

IOBUF_LVCMOS33_F_4

public static final Unisim IOBUF_LVCMOS33_F_4

IOBUF_LVCMOS33_F_6

public static final Unisim IOBUF_LVCMOS33_F_6

IOBUF_LVCMOS33_F_8

public static final Unisim IOBUF_LVCMOS33_F_8

IOBUF_LVCMOS33_S_12

public static final Unisim IOBUF_LVCMOS33_S_12

IOBUF_LVCMOS33_S_16

public static final Unisim IOBUF_LVCMOS33_S_16

IOBUF_LVCMOS33_S_2

public static final Unisim IOBUF_LVCMOS33_S_2

IOBUF_LVCMOS33_S_24

public static final Unisim IOBUF_LVCMOS33_S_24

IOBUF_LVCMOS33_S_4

public static final Unisim IOBUF_LVCMOS33_S_4

IOBUF_LVCMOS33_S_6

public static final Unisim IOBUF_LVCMOS33_S_6

IOBUF_LVCMOS33_S_8

public static final Unisim IOBUF_LVCMOS33_S_8

IOBUF_LVDCI_15

public static final Unisim IOBUF_LVDCI_15

IOBUF_LVDCI_18

public static final Unisim IOBUF_LVDCI_18

IOBUF_LVDCI_25

public static final Unisim IOBUF_LVDCI_25

IOBUF_LVDCI_33

public static final Unisim IOBUF_LVDCI_33

IOBUF_LVDCI_DV2_15

public static final Unisim IOBUF_LVDCI_DV2_15

IOBUF_LVDCI_DV2_18

public static final Unisim IOBUF_LVDCI_DV2_18

IOBUF_LVDCI_DV2_25

public static final Unisim IOBUF_LVDCI_DV2_25

IOBUF_LVDCI_DV2_33

public static final Unisim IOBUF_LVDCI_DV2_33

IOBUF_LVDS
```
public static final Unisim IOBUF_LVDS
```

IOBUF_LVPECL

public static final Unisim IOBUF_LVPECL

IOBUF_LVTTL
```
public static final Unisim IOBUF_LVTTL
```

IOBUF_LVTTL_F_12

public static final Unisim IOBUF_LVTTL_F_12

IOBUF_LVTTL_F_16

public static final Unisim IOBUF_LVTTL_F_16

IOBUF_LVTTL_F_2

public static final Unisim IOBUF_LVTTL_F_2

IOBUF_LVTTL_F_24

public static final Unisim IOBUF_LVTTL_F_24

IOBUF_LVTTL_F_4

public static final Unisim IOBUF_LVTTL_F_4

IOBUF_LVTTL_F_6

public static final Unisim IOBUF_LVTTL_F_6

IOBUF_LVTTL_F_8

public static final Unisim IOBUF_LVTTL_F_8

IOBUF_LVTTL_S_12

public static final Unisim IOBUF_LVTTL_S_12

IOBUF_LVTTL_S_16

public static final Unisim IOBUF_LVTTL_S_16

IOBUF_LVTTL_S_2

public static final Unisim IOBUF_LVTTL_S_2

IOBUF_LVTTL_S_24

public static final Unisim IOBUF_LVTTL_S_24

IOBUF_LVTTL_S_4

public static final Unisim IOBUF_LVTTL_S_4

IOBUF_LVTTL_S_6

public static final Unisim IOBUF_LVTTL_S_6

IOBUF_LVTTL_S_8

public static final Unisim IOBUF_LVTTL_S_8

IOBUF_ODDR
```
public static final Unisim IOBUF_ODDR
```

IOBUF_PCI33_3

public static final Unisim IOBUF_PCI33_3

IOBUF_PCI33_5

public static final Unisim IOBUF_PCI33_5

IOBUF_PCI66_3

public static final Unisim IOBUF_PCI66_3

IOBUF_PCIX
```
public static final Unisim IOBUF_PCIX
```

IOBUF_PCIX66_3

public static final Unisim IOBUF_PCIX66_3

IOBUF_SSTL18_I

public static final Unisim IOBUF_SSTL18_I

IOBUF_SSTL18_II

public static final Unisim IOBUF_SSTL18_II

IOBUF_SSTL18_II_DCI

public static final Unisim IOBUF_SSTL18_II_DCI

IOBUF_SSTL2_I

public static final Unisim IOBUF_SSTL2_I

IOBUF_SSTL2_II

public static final Unisim IOBUF_SSTL2_II

IOBUF_SSTL2_II_DCI

public static final Unisim IOBUF_SSTL2_II_DCI

IOBUF_SSTL3_I

public static final Unisim IOBUF_SSTL3_I

IOBUF_SSTL3_II

public static final Unisim IOBUF_SSTL3_II

IOBUF_SSTL3_II_DCI

public static final Unisim IOBUF_SSTL3_II_DCI

IOBUF_S_12
```
public static final Unisim IOBUF_S_12
```

IOBUF_S_16
```
public static final Unisim IOBUF_S_16
```

IOBUF_S_2
```
public static final Unisim IOBUF_S_2
```

IOBUF_S_24
```
public static final Unisim IOBUF_S_24
```

IOBUF_S_4
```
public static final Unisim IOBUF_S_4
```

IOBUF_S_6
```
public static final Unisim IOBUF_S_6
```

IOBUF_S_8
```
public static final Unisim IOBUF_S_8
```

IODELAY
```
public static final Unisim IODELAY
```

IODELAY2
```
public static final Unisim IODELAY2
```

IODELAYE1
```
public static final Unisim IODELAYE1
```

ISERDES
```
public static final Unisim ISERDES
```

ISERDESE1
```
public static final Unisim ISERDESE1
```

ISERDESE2
```
public static final Unisim ISERDESE2
```

ISERDESE3
```
public static final Unisim ISERDESE3
```

ISERDES_NODELAY

public static final Unisim ISERDES_NODELAY

ISP2
```
public static final Unisim ISP2
```

JTAG_SIME2
```
public static final Unisim JTAG_SIME2
```

KEEPER
```
public static final Unisim KEEPER
```

KEY_CLEAR
```
public static final Unisim KEY_CLEAR
```

LCLK_DELAY
```
public static final Unisim LCLK_DELAY
```

LD
```
public static final Unisim LD
```

LDC
```
public static final Unisim LDC
```

LDCE
```
public static final Unisim LDCE
```

LDCE_1
```
public static final Unisim LDCE_1
```

LDCP
```
public static final Unisim LDCP
```

LDCPE
```
public static final Unisim LDCPE
```

LDCPE_1
```
public static final Unisim LDCPE_1
```

LDCP_1
```
public static final Unisim LDCP_1
```

LDC_1
```
public static final Unisim LDC_1
```

LDE
```
public static final Unisim LDE
```

LDE_1
```
public static final Unisim LDE_1
```

LDP
```
public static final Unisim LDP
```

LDPE
```
public static final Unisim LDPE
```

LDPE_1
```
public static final Unisim LDPE_1
```

LDP_1
```
public static final Unisim LDP_1
```

LD_1
```
public static final Unisim LD_1
```

LOOKAHEAD8
```
public static final Unisim LOOKAHEAD8
```

LUT1
```
public static final Unisim LUT1
```

LUT1_D
```
public static final Unisim LUT1_D
```

LUT1_L
```
public static final Unisim LUT1_L
```

LUT2
```
public static final Unisim LUT2
```

LUT2_D
```
public static final Unisim LUT2_D
```

LUT2_L
```
public static final Unisim LUT2_L
```

LUT3
```
public static final Unisim LUT3
```

LUT3_D
```
public static final Unisim LUT3_D
```

LUT3_L
```
public static final Unisim LUT3_L
```

LUT4
```
public static final Unisim LUT4
```

LUT4_D
```
public static final Unisim LUT4_D
```

LUT4_L
```
public static final Unisim LUT4_L
```

LUT5
```
public static final Unisim LUT5
```

LUT5_D
```
public static final Unisim LUT5_D
```

LUT5_L
```
public static final Unisim LUT5_L
```

LUT6
```
public static final Unisim LUT6
```

LUT6CY
```
public static final Unisim LUT6CY
```

LUT6_2
```
public static final Unisim LUT6_2
```

LUT6_D
```
public static final Unisim LUT6_D
```

LUT6_L
```
public static final Unisim LUT6_L
```

LUTCY1
```
public static final Unisim LUTCY1
```

LUTCY2
```
public static final Unisim LUTCY2
```

MASTER_JTAG
```
public static final Unisim MASTER_JTAG
```

MBUFGCE
```
public static final Unisim MBUFGCE
```

MBUFGCE_DIV
```
public static final Unisim MBUFGCE_DIV
```

MBUFGCTRL
```
public static final Unisim MBUFGCTRL
```

MBUFG_GT
```
public static final Unisim MBUFG_GT
```

MBUFG_HM
```
public static final Unisim MBUFG_HM
```

MBUFG_PS
```
public static final Unisim MBUFG_PS
```

ME_NOC_M_AXI

public static final Unisim ME_NOC_M_AXI

ME_NOC_M_AXIS

public static final Unisim ME_NOC_M_AXIS

ME_NOC_S_AXI

public static final Unisim ME_NOC_S_AXI

ME_NOC_S_AXIS

public static final Unisim ME_NOC_S_AXIS

ME_PL_M_AXIS128

public static final Unisim ME_PL_M_AXIS128

ME_PL_M_AXIS32

public static final Unisim ME_PL_M_AXIS32

ME_PL_M_AXIS64

public static final Unisim ME_PL_M_AXIS64

ME_PL_M_EVENTS

public static final Unisim ME_PL_M_EVENTS

ME_PL_S_AXIS128

public static final Unisim ME_PL_S_AXIS128

ME_PL_S_AXIS32

public static final Unisim ME_PL_S_AXIS32

ME_PL_S_AXIS64

public static final Unisim ME_PL_S_AXIS64

ME_PL_S_EVENTS

public static final Unisim ME_PL_S_EVENTS

MMCME2_ADV
```
public static final Unisim MMCME2_ADV
```

MMCME2_BASE
```
public static final Unisim MMCME2_BASE
```

MMCME3_ADV
```
public static final Unisim MMCME3_ADV
```

MMCME3_BASE
```
public static final Unisim MMCME3_BASE
```

MMCME4_ADV
```
public static final Unisim MMCME4_ADV
```

MMCME4_BASE
```
public static final Unisim MMCME4_BASE
```

MMCME5
```
public static final Unisim MMCME5
```

MMCM_ADV
```
public static final Unisim MMCM_ADV
```

MMCM_BASE
```
public static final Unisim MMCM_BASE
```

MMI
```
public static final Unisim MMI
```

MRMAC
```
public static final Unisim MRMAC
```

MULT18X18
```
public static final Unisim MULT18X18
```

MULT18X18S
```
public static final Unisim MULT18X18S
```

MULT18X18SIO

public static final Unisim MULT18X18SIO

MULT_AND
```
public static final Unisim MULT_AND
```

MUXCY
```
public static final Unisim MUXCY
```

MUXCY_D
```
public static final Unisim MUXCY_D
```

MUXCY_L
```
public static final Unisim MUXCY_L
```

MUXF5
```
public static final Unisim MUXF5
```

MUXF5_D
```
public static final Unisim MUXF5_D
```

MUXF5_L
```
public static final Unisim MUXF5_L
```

MUXF6
```
public static final Unisim MUXF6
```

MUXF6_D
```
public static final Unisim MUXF6_D
```

MUXF6_L
```
public static final Unisim MUXF6_L
```

MUXF7
```
public static final Unisim MUXF7
```

MUXF7_D
```
public static final Unisim MUXF7_D
```

MUXF7_L
```
public static final Unisim MUXF7_L
```

MUXF8
```
public static final Unisim MUXF8
```

MUXF8_D
```
public static final Unisim MUXF8_D
```

MUXF8_L
```
public static final Unisim MUXF8_L
```

MUXF9
```
public static final Unisim MUXF9
```

NAND2
```
public static final Unisim NAND2
```

NAND2B1
```
public static final Unisim NAND2B1
```

NAND2B2
```
public static final Unisim NAND2B2
```

NAND3
```
public static final Unisim NAND3
```

NAND3B1
```
public static final Unisim NAND3B1
```

NAND3B2
```
public static final Unisim NAND3B2
```

NAND3B3
```
public static final Unisim NAND3B3
```

NAND4
```
public static final Unisim NAND4
```

NAND4B1
```
public static final Unisim NAND4B1
```

NAND4B2
```
public static final Unisim NAND4B2
```

NAND4B3
```
public static final Unisim NAND4B3
```

NAND4B4
```
public static final Unisim NAND4B4
```

NAND5
```
public static final Unisim NAND5
```

NAND5B1
```
public static final Unisim NAND5B1
```

NAND5B2
```
public static final Unisim NAND5B2
```

NAND5B3
```
public static final Unisim NAND5B3
```

NAND5B4
```
public static final Unisim NAND5B4
```

NAND5B5
```
public static final Unisim NAND5B5
```

NOC2_NMU128
```
public static final Unisim NOC2_NMU128
```

NOC2_NMU256
```
public static final Unisim NOC2_NMU256
```

NOC2_NMU512
```
public static final Unisim NOC2_NMU512
```

NOC2_NPS5555

public static final Unisim NOC2_NPS5555

NOC2_NPS7575

public static final Unisim NOC2_NPS7575

NOC2_NSU128
```
public static final Unisim NOC2_NSU128
```

NOC2_NSU256
```
public static final Unisim NOC2_NSU256
```

NOC2_NSU512
```
public static final Unisim NOC2_NSU512
```

NOC2_XBR2X4
```
public static final Unisim NOC2_XBR2X4
```

NOC2_XBR4X2
```
public static final Unisim NOC2_XBR4X2
```

NOC_NCRB
```
public static final Unisim NOC_NCRB
```

NOC_NCRB_SSIT

public static final Unisim NOC_NCRB_SSIT

NOC_NIDB
```
public static final Unisim NOC_NIDB
```

NOC_NMU128
```
public static final Unisim NOC_NMU128
```

NOC_NMU256
```
public static final Unisim NOC_NMU256
```

NOC_NMU512
```
public static final Unisim NOC_NMU512
```

NOC_NMU_HBM2E

public static final Unisim NOC_NMU_HBM2E

NOC_NPP_RPTR

public static final Unisim NOC_NPP_RPTR

NOC_NPS4
```
public static final Unisim NOC_NPS4
```

NOC_NPS5555
```
public static final Unisim NOC_NPS5555
```

NOC_NPS6
```
public static final Unisim NOC_NPS6
```

NOC_NPS7575
```
public static final Unisim NOC_NPS7575
```

NOC_NPS_VNOC

public static final Unisim NOC_NPS_VNOC

NOC_NSU128
```
public static final Unisim NOC_NSU128
```

NOC_NSU512
```
public static final Unisim NOC_NSU512
```

NOR2
```
public static final Unisim NOR2
```

NOR2B1
```
public static final Unisim NOR2B1
```

NOR2B2
```
public static final Unisim NOR2B2
```

NOR3
```
public static final Unisim NOR3
```

NOR3B1
```
public static final Unisim NOR3B1
```

NOR3B2
```
public static final Unisim NOR3B2
```

NOR3B3
```
public static final Unisim NOR3B3
```

NOR4
```
public static final Unisim NOR4
```

NOR4B1
```
public static final Unisim NOR4B1
```

NOR4B2
```
public static final Unisim NOR4B2
```

NOR4B3
```
public static final Unisim NOR4B3
```

NOR4B4
```
public static final Unisim NOR4B4
```

NOR5
```
public static final Unisim NOR5
```

NOR5B1
```
public static final Unisim NOR5B1
```

NOR5B2
```
public static final Unisim NOR5B2
```

NOR5B3
```
public static final Unisim NOR5B3
```

NOR5B4
```
public static final Unisim NOR5B4
```

NOR5B5
```
public static final Unisim NOR5B5
```

NPI_NIR
```
public static final Unisim NPI_NIR
```

OBUF
```
public static final Unisim OBUF
```

OBUFDS
```
public static final Unisim OBUFDS
```

OBUFDS_BLVDS_25

public static final Unisim OBUFDS_BLVDS_25

OBUFDS_COMP
```
public static final Unisim OBUFDS_COMP
```

OBUFDS_COMP_ODDR

public static final Unisim OBUFDS_COMP_ODDR

OBUFDS_DPHY
```
public static final Unisim OBUFDS_DPHY
```

OBUFDS_DPHY_COMP

public static final Unisim OBUFDS_DPHY_COMP

OBUFDS_GTE3
```
public static final Unisim OBUFDS_GTE3
```

OBUFDS_GTE3_ADV

public static final Unisim OBUFDS_GTE3_ADV

OBUFDS_GTE4
```
public static final Unisim OBUFDS_GTE4
```

OBUFDS_GTE4_ADV

public static final Unisim OBUFDS_GTE4_ADV

OBUFDS_GTE5
```
public static final Unisim OBUFDS_GTE5
```

OBUFDS_GTE5_ADV

public static final Unisim OBUFDS_GTE5_ADV

OBUFDS_GTM
```
public static final Unisim OBUFDS_GTM
```

OBUFDS_GTME5

public static final Unisim OBUFDS_GTME5

OBUFDS_GTME5_ADV

public static final Unisim OBUFDS_GTME5_ADV

OBUFDS_GTM_ADV

public static final Unisim OBUFDS_GTM_ADV

OBUFDS_LDT_25

public static final Unisim OBUFDS_LDT_25

OBUFDS_LVDSEXT_25

public static final Unisim OBUFDS_LVDSEXT_25

OBUFDS_LVDSEXT_33

public static final Unisim OBUFDS_LVDSEXT_33

OBUFDS_LVDS_25

public static final Unisim OBUFDS_LVDS_25

OBUFDS_LVDS_33

public static final Unisim OBUFDS_LVDS_33

OBUFDS_LVPECL_25

public static final Unisim OBUFDS_LVPECL_25

OBUFDS_LVPECL_33

public static final Unisim OBUFDS_LVPECL_33

OBUFDS_ODDR
```
public static final Unisim OBUFDS_ODDR
```

OBUFDS_ULVDS_25

public static final Unisim OBUFDS_ULVDS_25

OBUFT
```
public static final Unisim OBUFT
```

OBUFTDS
```
public static final Unisim OBUFTDS
```

OBUFTDS_BLVDS_25

public static final Unisim OBUFTDS_BLVDS_25

OBUFTDS_COMP

public static final Unisim OBUFTDS_COMP

OBUFTDS_COMP_ODDR

public static final Unisim OBUFTDS_COMP_ODDR

OBUFTDS_DCIEN

public static final Unisim OBUFTDS_DCIEN

OBUFTDS_LDT_25

public static final Unisim OBUFTDS_LDT_25

OBUFTDS_LVDSEXT_25

public static final Unisim OBUFTDS_LVDSEXT_25

OBUFTDS_LVDSEXT_33

public static final Unisim OBUFTDS_LVDSEXT_33

OBUFTDS_LVDS_25

public static final Unisim OBUFTDS_LVDS_25

OBUFTDS_LVDS_33

public static final Unisim OBUFTDS_LVDS_33

OBUFTDS_LVPECL_25

public static final Unisim OBUFTDS_LVPECL_25

OBUFTDS_LVPECL_33

public static final Unisim OBUFTDS_LVPECL_33

OBUFTDS_ODDR

public static final Unisim OBUFTDS_ODDR

OBUFTDS_ULVDS_25

public static final Unisim OBUFTDS_ULVDS_25

OBUFT_AGP
```
public static final Unisim OBUFT_AGP
```

OBUFT_CTT
```
public static final Unisim OBUFT_CTT
```

OBUFT_DCIEN
```
public static final Unisim OBUFT_DCIEN
```

OBUFT_F_12
```
public static final Unisim OBUFT_F_12
```

OBUFT_F_16
```
public static final Unisim OBUFT_F_16
```

OBUFT_F_2
```
public static final Unisim OBUFT_F_2
```

OBUFT_F_24
```
public static final Unisim OBUFT_F_24
```

OBUFT_F_4
```
public static final Unisim OBUFT_F_4
```

OBUFT_F_6
```
public static final Unisim OBUFT_F_6
```

OBUFT_F_8
```
public static final Unisim OBUFT_F_8
```

OBUFT_GTL
```
public static final Unisim OBUFT_GTL
```

OBUFT_GTLP
```
public static final Unisim OBUFT_GTLP
```

OBUFT_GTLP_DCI

public static final Unisim OBUFT_GTLP_DCI

OBUFT_GTL_DCI

public static final Unisim OBUFT_GTL_DCI

OBUFT_HSTL_I

public static final Unisim OBUFT_HSTL_I

OBUFT_HSTL_II

public static final Unisim OBUFT_HSTL_II

OBUFT_HSTL_III

public static final Unisim OBUFT_HSTL_III

OBUFT_HSTL_III_18

public static final Unisim OBUFT_HSTL_III_18

OBUFT_HSTL_III_DCI

public static final Unisim OBUFT_HSTL_III_DCI

OBUFT_HSTL_III_DCI_18

public static final Unisim OBUFT_HSTL_III_DCI_18

OBUFT_HSTL_II_18

public static final Unisim OBUFT_HSTL_II_18

OBUFT_HSTL_II_DCI

public static final Unisim OBUFT_HSTL_II_DCI

OBUFT_HSTL_II_DCI_18

public static final Unisim OBUFT_HSTL_II_DCI_18

OBUFT_HSTL_IV

public static final Unisim OBUFT_HSTL_IV

OBUFT_HSTL_IV_18

public static final Unisim OBUFT_HSTL_IV_18

OBUFT_HSTL_IV_DCI

public static final Unisim OBUFT_HSTL_IV_DCI

OBUFT_HSTL_IV_DCI_18

public static final Unisim OBUFT_HSTL_IV_DCI_18

OBUFT_HSTL_I_18

public static final Unisim OBUFT_HSTL_I_18

OBUFT_HSTL_I_DCI

public static final Unisim OBUFT_HSTL_I_DCI

OBUFT_HSTL_I_DCI_18

public static final Unisim OBUFT_HSTL_I_DCI_18

OBUFT_LVCMOS12

public static final Unisim OBUFT_LVCMOS12

OBUFT_LVCMOS12_F_2

public static final Unisim OBUFT_LVCMOS12_F_2

OBUFT_LVCMOS12_F_4

public static final Unisim OBUFT_LVCMOS12_F_4

OBUFT_LVCMOS12_F_6

public static final Unisim OBUFT_LVCMOS12_F_6

OBUFT_LVCMOS12_F_8

public static final Unisim OBUFT_LVCMOS12_F_8

OBUFT_LVCMOS12_S_2

public static final Unisim OBUFT_LVCMOS12_S_2

OBUFT_LVCMOS12_S_4

public static final Unisim OBUFT_LVCMOS12_S_4

OBUFT_LVCMOS12_S_6

public static final Unisim OBUFT_LVCMOS12_S_6

OBUFT_LVCMOS12_S_8

public static final Unisim OBUFT_LVCMOS12_S_8

OBUFT_LVCMOS15

public static final Unisim OBUFT_LVCMOS15

OBUFT_LVCMOS15_F_12

public static final Unisim OBUFT_LVCMOS15_F_12

OBUFT_LVCMOS15_F_16

public static final Unisim OBUFT_LVCMOS15_F_16

OBUFT_LVCMOS15_F_2

public static final Unisim OBUFT_LVCMOS15_F_2

OBUFT_LVCMOS15_F_4

public static final Unisim OBUFT_LVCMOS15_F_4

OBUFT_LVCMOS15_F_6

public static final Unisim OBUFT_LVCMOS15_F_6

OBUFT_LVCMOS15_F_8

public static final Unisim OBUFT_LVCMOS15_F_8

OBUFT_LVCMOS15_S_12

public static final Unisim OBUFT_LVCMOS15_S_12

OBUFT_LVCMOS15_S_16

public static final Unisim OBUFT_LVCMOS15_S_16

OBUFT_LVCMOS15_S_2

public static final Unisim OBUFT_LVCMOS15_S_2

OBUFT_LVCMOS15_S_4

public static final Unisim OBUFT_LVCMOS15_S_4

OBUFT_LVCMOS15_S_6

public static final Unisim OBUFT_LVCMOS15_S_6

OBUFT_LVCMOS15_S_8

public static final Unisim OBUFT_LVCMOS15_S_8

OBUFT_LVCMOS18

public static final Unisim OBUFT_LVCMOS18

OBUFT_LVCMOS18_F_12

public static final Unisim OBUFT_LVCMOS18_F_12

OBUFT_LVCMOS18_F_16

public static final Unisim OBUFT_LVCMOS18_F_16

OBUFT_LVCMOS18_F_2

public static final Unisim OBUFT_LVCMOS18_F_2

OBUFT_LVCMOS18_F_4

public static final Unisim OBUFT_LVCMOS18_F_4

OBUFT_LVCMOS18_F_6

public static final Unisim OBUFT_LVCMOS18_F_6

OBUFT_LVCMOS18_F_8

public static final Unisim OBUFT_LVCMOS18_F_8

OBUFT_LVCMOS18_S_12

public static final Unisim OBUFT_LVCMOS18_S_12

OBUFT_LVCMOS18_S_16

public static final Unisim OBUFT_LVCMOS18_S_16

OBUFT_LVCMOS18_S_2

public static final Unisim OBUFT_LVCMOS18_S_2

OBUFT_LVCMOS18_S_4

public static final Unisim OBUFT_LVCMOS18_S_4

OBUFT_LVCMOS18_S_6

public static final Unisim OBUFT_LVCMOS18_S_6

OBUFT_LVCMOS18_S_8

public static final Unisim OBUFT_LVCMOS18_S_8

OBUFT_LVCMOS2

public static final Unisim OBUFT_LVCMOS2

OBUFT_LVCMOS25

public static final Unisim OBUFT_LVCMOS25

OBUFT_LVCMOS25_F_12

public static final Unisim OBUFT_LVCMOS25_F_12

OBUFT_LVCMOS25_F_16

public static final Unisim OBUFT_LVCMOS25_F_16

OBUFT_LVCMOS25_F_2

public static final Unisim OBUFT_LVCMOS25_F_2

OBUFT_LVCMOS25_F_24

public static final Unisim OBUFT_LVCMOS25_F_24

OBUFT_LVCMOS25_F_4

public static final Unisim OBUFT_LVCMOS25_F_4

OBUFT_LVCMOS25_F_6

public static final Unisim OBUFT_LVCMOS25_F_6

OBUFT_LVCMOS25_F_8

public static final Unisim OBUFT_LVCMOS25_F_8

OBUFT_LVCMOS25_S_12

public static final Unisim OBUFT_LVCMOS25_S_12

OBUFT_LVCMOS25_S_16

public static final Unisim OBUFT_LVCMOS25_S_16

OBUFT_LVCMOS25_S_2

public static final Unisim OBUFT_LVCMOS25_S_2

OBUFT_LVCMOS25_S_24

public static final Unisim OBUFT_LVCMOS25_S_24

OBUFT_LVCMOS25_S_4

public static final Unisim OBUFT_LVCMOS25_S_4

OBUFT_LVCMOS25_S_6

public static final Unisim OBUFT_LVCMOS25_S_6

OBUFT_LVCMOS25_S_8

public static final Unisim OBUFT_LVCMOS25_S_8

OBUFT_LVCMOS33

public static final Unisim OBUFT_LVCMOS33

OBUFT_LVCMOS33_F_12

public static final Unisim OBUFT_LVCMOS33_F_12

OBUFT_LVCMOS33_F_16

public static final Unisim OBUFT_LVCMOS33_F_16

OBUFT_LVCMOS33_F_2

public static final Unisim OBUFT_LVCMOS33_F_2

OBUFT_LVCMOS33_F_24

public static final Unisim OBUFT_LVCMOS33_F_24

OBUFT_LVCMOS33_F_4

public static final Unisim OBUFT_LVCMOS33_F_4

OBUFT_LVCMOS33_F_6

public static final Unisim OBUFT_LVCMOS33_F_6

OBUFT_LVCMOS33_F_8

public static final Unisim OBUFT_LVCMOS33_F_8

OBUFT_LVCMOS33_S_12

public static final Unisim OBUFT_LVCMOS33_S_12

OBUFT_LVCMOS33_S_16

public static final Unisim OBUFT_LVCMOS33_S_16

OBUFT_LVCMOS33_S_2

public static final Unisim OBUFT_LVCMOS33_S_2

OBUFT_LVCMOS33_S_24

public static final Unisim OBUFT_LVCMOS33_S_24

OBUFT_LVCMOS33_S_4

public static final Unisim OBUFT_LVCMOS33_S_4

OBUFT_LVCMOS33_S_6

public static final Unisim OBUFT_LVCMOS33_S_6

OBUFT_LVCMOS33_S_8

public static final Unisim OBUFT_LVCMOS33_S_8

OBUFT_LVDCI_15

public static final Unisim OBUFT_LVDCI_15

OBUFT_LVDCI_18

public static final Unisim OBUFT_LVDCI_18

OBUFT_LVDCI_25

public static final Unisim OBUFT_LVDCI_25

OBUFT_LVDCI_33

public static final Unisim OBUFT_LVDCI_33

OBUFT_LVDCI_DV2_15

public static final Unisim OBUFT_LVDCI_DV2_15

OBUFT_LVDCI_DV2_18

public static final Unisim OBUFT_LVDCI_DV2_18

OBUFT_LVDCI_DV2_25

public static final Unisim OBUFT_LVDCI_DV2_25

OBUFT_LVDCI_DV2_33

public static final Unisim OBUFT_LVDCI_DV2_33

OBUFT_LVDS
```
public static final Unisim OBUFT_LVDS
```

OBUFT_LVPECL

public static final Unisim OBUFT_LVPECL

OBUFT_LVTTL
```
public static final Unisim OBUFT_LVTTL
```

OBUFT_LVTTL_F_12

public static final Unisim OBUFT_LVTTL_F_12

OBUFT_LVTTL_F_16

public static final Unisim OBUFT_LVTTL_F_16

OBUFT_LVTTL_F_2

public static final Unisim OBUFT_LVTTL_F_2

OBUFT_LVTTL_F_24

public static final Unisim OBUFT_LVTTL_F_24

OBUFT_LVTTL_F_4

public static final Unisim OBUFT_LVTTL_F_4

OBUFT_LVTTL_F_6

public static final Unisim OBUFT_LVTTL_F_6

OBUFT_LVTTL_F_8

public static final Unisim OBUFT_LVTTL_F_8

OBUFT_LVTTL_S_12

public static final Unisim OBUFT_LVTTL_S_12

OBUFT_LVTTL_S_16

public static final Unisim OBUFT_LVTTL_S_16

OBUFT_LVTTL_S_2

public static final Unisim OBUFT_LVTTL_S_2

OBUFT_LVTTL_S_24

public static final Unisim OBUFT_LVTTL_S_24

OBUFT_LVTTL_S_4

public static final Unisim OBUFT_LVTTL_S_4

OBUFT_LVTTL_S_6

public static final Unisim OBUFT_LVTTL_S_6

OBUFT_LVTTL_S_8

public static final Unisim OBUFT_LVTTL_S_8

OBUFT_ODDR
```
public static final Unisim OBUFT_ODDR
```

OBUFT_PCI33_3

public static final Unisim OBUFT_PCI33_3

OBUFT_PCI33_5

public static final Unisim OBUFT_PCI33_5

OBUFT_PCI66_3

public static final Unisim OBUFT_PCI66_3

OBUFT_PCIX
```
public static final Unisim OBUFT_PCIX
```

OBUFT_PCIX66_3

public static final Unisim OBUFT_PCIX66_3

OBUFT_SSTL18_I

public static final Unisim OBUFT_SSTL18_I

OBUFT_SSTL18_II

public static final Unisim OBUFT_SSTL18_II

OBUFT_SSTL18_II_DCI

public static final Unisim OBUFT_SSTL18_II_DCI

OBUFT_SSTL18_I_DCI

public static final Unisim OBUFT_SSTL18_I_DCI

OBUFT_SSTL2_I

public static final Unisim OBUFT_SSTL2_I

OBUFT_SSTL2_II

public static final Unisim OBUFT_SSTL2_II

OBUFT_SSTL2_II_DCI

public static final Unisim OBUFT_SSTL2_II_DCI

OBUFT_SSTL2_I_DCI

public static final Unisim OBUFT_SSTL2_I_DCI

OBUFT_SSTL3_I

public static final Unisim OBUFT_SSTL3_I

OBUFT_SSTL3_II

public static final Unisim OBUFT_SSTL3_II

OBUFT_SSTL3_II_DCI

public static final Unisim OBUFT_SSTL3_II_DCI

OBUFT_SSTL3_I_DCI

public static final Unisim OBUFT_SSTL3_I_DCI

OBUFT_S_12
```
public static final Unisim OBUFT_S_12
```

OBUFT_S_16
```
public static final Unisim OBUFT_S_16
```

OBUFT_S_2
```
public static final Unisim OBUFT_S_2
```

OBUFT_S_24
```
public static final Unisim OBUFT_S_24
```

OBUFT_S_4
```
public static final Unisim OBUFT_S_4
```

OBUFT_S_6
```
public static final Unisim OBUFT_S_6
```

OBUFT_S_8
```
public static final Unisim OBUFT_S_8
```

OBUF_AGP
```
public static final Unisim OBUF_AGP
```

OBUF_CTT
```
public static final Unisim OBUF_CTT
```

OBUF_F_12
```
public static final Unisim OBUF_F_12
```

OBUF_F_16
```
public static final Unisim OBUF_F_16
```

OBUF_F_2
```
public static final Unisim OBUF_F_2
```

OBUF_F_24
```
public static final Unisim OBUF_F_24
```

OBUF_F_4
```
public static final Unisim OBUF_F_4
```

OBUF_F_6
```
public static final Unisim OBUF_F_6
```

OBUF_F_8
```
public static final Unisim OBUF_F_8
```

OBUF_GTL
```
public static final Unisim OBUF_GTL
```

OBUF_GTLP
```
public static final Unisim OBUF_GTLP
```

OBUF_GTLP_DCI

public static final Unisim OBUF_GTLP_DCI

OBUF_GTL_DCI

public static final Unisim OBUF_GTL_DCI

OBUF_HSTL_I
```
public static final Unisim OBUF_HSTL_I
```

OBUF_HSTL_II

public static final Unisim OBUF_HSTL_II

OBUF_HSTL_III

public static final Unisim OBUF_HSTL_III

OBUF_HSTL_III_18

public static final Unisim OBUF_HSTL_III_18

OBUF_HSTL_III_DCI

public static final Unisim OBUF_HSTL_III_DCI

OBUF_HSTL_III_DCI_18

public static final Unisim OBUF_HSTL_III_DCI_18

OBUF_HSTL_II_18

public static final Unisim OBUF_HSTL_II_18

OBUF_HSTL_II_DCI

public static final Unisim OBUF_HSTL_II_DCI

OBUF_HSTL_II_DCI_18

public static final Unisim OBUF_HSTL_II_DCI_18

OBUF_HSTL_IV

public static final Unisim OBUF_HSTL_IV

OBUF_HSTL_IV_18

public static final Unisim OBUF_HSTL_IV_18

OBUF_HSTL_IV_DCI

public static final Unisim OBUF_HSTL_IV_DCI

OBUF_HSTL_IV_DCI_18

public static final Unisim OBUF_HSTL_IV_DCI_18

OBUF_HSTL_I_18

public static final Unisim OBUF_HSTL_I_18

OBUF_HSTL_I_DCI

public static final Unisim OBUF_HSTL_I_DCI

OBUF_HSTL_I_DCI_18

public static final Unisim OBUF_HSTL_I_DCI_18

OBUF_LVCMOS12

public static final Unisim OBUF_LVCMOS12

OBUF_LVCMOS12_F_2

public static final Unisim OBUF_LVCMOS12_F_2

OBUF_LVCMOS12_F_4

public static final Unisim OBUF_LVCMOS12_F_4

OBUF_LVCMOS12_F_6

public static final Unisim OBUF_LVCMOS12_F_6

OBUF_LVCMOS12_F_8

public static final Unisim OBUF_LVCMOS12_F_8

OBUF_LVCMOS12_S_2

public static final Unisim OBUF_LVCMOS12_S_2

OBUF_LVCMOS12_S_4

public static final Unisim OBUF_LVCMOS12_S_4

OBUF_LVCMOS12_S_6

public static final Unisim OBUF_LVCMOS12_S_6

OBUF_LVCMOS12_S_8

public static final Unisim OBUF_LVCMOS12_S_8

OBUF_LVCMOS15

public static final Unisim OBUF_LVCMOS15

OBUF_LVCMOS15_F_12

public static final Unisim OBUF_LVCMOS15_F_12

OBUF_LVCMOS15_F_16

public static final Unisim OBUF_LVCMOS15_F_16

OBUF_LVCMOS15_F_2

public static final Unisim OBUF_LVCMOS15_F_2

OBUF_LVCMOS15_F_4

public static final Unisim OBUF_LVCMOS15_F_4

OBUF_LVCMOS15_F_6

public static final Unisim OBUF_LVCMOS15_F_6

OBUF_LVCMOS15_F_8

public static final Unisim OBUF_LVCMOS15_F_8

OBUF_LVCMOS15_S_12

public static final Unisim OBUF_LVCMOS15_S_12

OBUF_LVCMOS15_S_16

public static final Unisim OBUF_LVCMOS15_S_16

OBUF_LVCMOS15_S_2

public static final Unisim OBUF_LVCMOS15_S_2

OBUF_LVCMOS15_S_4

public static final Unisim OBUF_LVCMOS15_S_4

OBUF_LVCMOS15_S_6

public static final Unisim OBUF_LVCMOS15_S_6

OBUF_LVCMOS15_S_8

public static final Unisim OBUF_LVCMOS15_S_8

OBUF_LVCMOS18

public static final Unisim OBUF_LVCMOS18

OBUF_LVCMOS18_F_12

public static final Unisim OBUF_LVCMOS18_F_12

OBUF_LVCMOS18_F_16

public static final Unisim OBUF_LVCMOS18_F_16

OBUF_LVCMOS18_F_2

public static final Unisim OBUF_LVCMOS18_F_2

OBUF_LVCMOS18_F_4

public static final Unisim OBUF_LVCMOS18_F_4

OBUF_LVCMOS18_F_6

public static final Unisim OBUF_LVCMOS18_F_6

OBUF_LVCMOS18_F_8

public static final Unisim OBUF_LVCMOS18_F_8

OBUF_LVCMOS18_S_12

public static final Unisim OBUF_LVCMOS18_S_12

OBUF_LVCMOS18_S_16

public static final Unisim OBUF_LVCMOS18_S_16

OBUF_LVCMOS18_S_2

public static final Unisim OBUF_LVCMOS18_S_2

OBUF_LVCMOS18_S_4

public static final Unisim OBUF_LVCMOS18_S_4

OBUF_LVCMOS18_S_6

public static final Unisim OBUF_LVCMOS18_S_6

OBUF_LVCMOS18_S_8

public static final Unisim OBUF_LVCMOS18_S_8

OBUF_LVCMOS2

public static final Unisim OBUF_LVCMOS2

OBUF_LVCMOS25

public static final Unisim OBUF_LVCMOS25

OBUF_LVCMOS25_F_12

public static final Unisim OBUF_LVCMOS25_F_12

OBUF_LVCMOS25_F_16

public static final Unisim OBUF_LVCMOS25_F_16

OBUF_LVCMOS25_F_2

public static final Unisim OBUF_LVCMOS25_F_2

OBUF_LVCMOS25_F_24

public static final Unisim OBUF_LVCMOS25_F_24

OBUF_LVCMOS25_F_4

public static final Unisim OBUF_LVCMOS25_F_4

OBUF_LVCMOS25_F_6

public static final Unisim OBUF_LVCMOS25_F_6

OBUF_LVCMOS25_F_8

public static final Unisim OBUF_LVCMOS25_F_8

OBUF_LVCMOS25_S_12

public static final Unisim OBUF_LVCMOS25_S_12

OBUF_LVCMOS25_S_16

public static final Unisim OBUF_LVCMOS25_S_16

OBUF_LVCMOS25_S_2

public static final Unisim OBUF_LVCMOS25_S_2

OBUF_LVCMOS25_S_24

public static final Unisim OBUF_LVCMOS25_S_24

OBUF_LVCMOS25_S_4

public static final Unisim OBUF_LVCMOS25_S_4

OBUF_LVCMOS25_S_6

public static final Unisim OBUF_LVCMOS25_S_6

OBUF_LVCMOS25_S_8

public static final Unisim OBUF_LVCMOS25_S_8

OBUF_LVCMOS33

public static final Unisim OBUF_LVCMOS33

OBUF_LVCMOS33_F_12

public static final Unisim OBUF_LVCMOS33_F_12

OBUF_LVCMOS33_F_16

public static final Unisim OBUF_LVCMOS33_F_16

OBUF_LVCMOS33_F_2

public static final Unisim OBUF_LVCMOS33_F_2

OBUF_LVCMOS33_F_24

public static final Unisim OBUF_LVCMOS33_F_24

OBUF_LVCMOS33_F_4

public static final Unisim OBUF_LVCMOS33_F_4

OBUF_LVCMOS33_F_6

public static final Unisim OBUF_LVCMOS33_F_6

OBUF_LVCMOS33_F_8

public static final Unisim OBUF_LVCMOS33_F_8

OBUF_LVCMOS33_S_12

public static final Unisim OBUF_LVCMOS33_S_12

OBUF_LVCMOS33_S_16

public static final Unisim OBUF_LVCMOS33_S_16

OBUF_LVCMOS33_S_2

public static final Unisim OBUF_LVCMOS33_S_2

OBUF_LVCMOS33_S_24

public static final Unisim OBUF_LVCMOS33_S_24

OBUF_LVCMOS33_S_4

public static final Unisim OBUF_LVCMOS33_S_4

OBUF_LVCMOS33_S_6

public static final Unisim OBUF_LVCMOS33_S_6

OBUF_LVCMOS33_S_8

public static final Unisim OBUF_LVCMOS33_S_8

OBUF_LVDCI_15

public static final Unisim OBUF_LVDCI_15

OBUF_LVDCI_18

public static final Unisim OBUF_LVDCI_18

OBUF_LVDCI_25

public static final Unisim OBUF_LVDCI_25

OBUF_LVDCI_33

public static final Unisim OBUF_LVDCI_33

OBUF_LVDCI_DV2_15

public static final Unisim OBUF_LVDCI_DV2_15

OBUF_LVDCI_DV2_18

public static final Unisim OBUF_LVDCI_DV2_18

OBUF_LVDCI_DV2_25

public static final Unisim OBUF_LVDCI_DV2_25

OBUF_LVDCI_DV2_33

public static final Unisim OBUF_LVDCI_DV2_33

OBUF_LVDS
```
public static final Unisim OBUF_LVDS
```

OBUF_LVPECL
```
public static final Unisim OBUF_LVPECL
```

OBUF_LVTTL
```
public static final Unisim OBUF_LVTTL
```

OBUF_LVTTL_F_12

public static final Unisim OBUF_LVTTL_F_12

OBUF_LVTTL_F_16

public static final Unisim OBUF_LVTTL_F_16

OBUF_LVTTL_F_2

public static final Unisim OBUF_LVTTL_F_2

OBUF_LVTTL_F_24

public static final Unisim OBUF_LVTTL_F_24

OBUF_LVTTL_F_4

public static final Unisim OBUF_LVTTL_F_4

OBUF_LVTTL_F_6

public static final Unisim OBUF_LVTTL_F_6

OBUF_LVTTL_F_8

public static final Unisim OBUF_LVTTL_F_8

OBUF_LVTTL_S_12

public static final Unisim OBUF_LVTTL_S_12

OBUF_LVTTL_S_16

public static final Unisim OBUF_LVTTL_S_16

OBUF_LVTTL_S_2

public static final Unisim OBUF_LVTTL_S_2

OBUF_LVTTL_S_24

public static final Unisim OBUF_LVTTL_S_24

OBUF_LVTTL_S_4

public static final Unisim OBUF_LVTTL_S_4

OBUF_LVTTL_S_6

public static final Unisim OBUF_LVTTL_S_6

OBUF_LVTTL_S_8

public static final Unisim OBUF_LVTTL_S_8

OBUF_ODDR
```
public static final Unisim OBUF_ODDR
```

OBUF_PCI33_3

public static final Unisim OBUF_PCI33_3

OBUF_PCI33_5

public static final Unisim OBUF_PCI33_5

OBUF_PCI66_3

public static final Unisim OBUF_PCI66_3

OBUF_PCIX
```
public static final Unisim OBUF_PCIX
```

OBUF_PCIX66_3

public static final Unisim OBUF_PCIX66_3

OBUF_SSTL18_I

public static final Unisim OBUF_SSTL18_I

OBUF_SSTL18_II

public static final Unisim OBUF_SSTL18_II

OBUF_SSTL18_II_DCI

public static final Unisim OBUF_SSTL18_II_DCI

OBUF_SSTL18_I_DCI

public static final Unisim OBUF_SSTL18_I_DCI

OBUF_SSTL2_I

public static final Unisim OBUF_SSTL2_I

OBUF_SSTL2_II

public static final Unisim OBUF_SSTL2_II

OBUF_SSTL2_II_DCI

public static final Unisim OBUF_SSTL2_II_DCI

OBUF_SSTL2_I_DCI

public static final Unisim OBUF_SSTL2_I_DCI

OBUF_SSTL3_I

public static final Unisim OBUF_SSTL3_I

OBUF_SSTL3_II

public static final Unisim OBUF_SSTL3_II

OBUF_SSTL3_II_DCI

public static final Unisim OBUF_SSTL3_II_DCI

OBUF_SSTL3_I_DCI

public static final Unisim OBUF_SSTL3_I_DCI

OBUF_S_12
```
public static final Unisim OBUF_S_12
```

OBUF_S_16
```
public static final Unisim OBUF_S_16
```

OBUF_S_2
```
public static final Unisim OBUF_S_2
```

OBUF_S_24
```
public static final Unisim OBUF_S_24
```

OBUF_S_4
```
public static final Unisim OBUF_S_4
```

OBUF_S_6
```
public static final Unisim OBUF_S_6
```

OBUF_S_8
```
public static final Unisim OBUF_S_8
```

ODDR
```
public static final Unisim ODDR
```

ODDR2
```
public static final Unisim ODDR2
```

ODDRE1
```
public static final Unisim ODDRE1
```

ODELAYE2
```
public static final Unisim ODELAYE2
```

ODELAYE2_FINEDELAY

public static final Unisim ODELAYE2_FINEDELAY

ODELAYE3
```
public static final Unisim ODELAYE3
```

ODELAYE5
```
public static final Unisim ODELAYE5
```

OR2
```
public static final Unisim OR2
```

OR2B1
```
public static final Unisim OR2B1
```

OR2B2
```
public static final Unisim OR2B2
```

OR2L
```
public static final Unisim OR2L
```

OR3
```
public static final Unisim OR3
```

OR3B1
```
public static final Unisim OR3B1
```

OR3B2
```
public static final Unisim OR3B2
```

OR3B3
```
public static final Unisim OR3B3
```

OR4
```
public static final Unisim OR4
```

OR4B1
```
public static final Unisim OR4B1
```

OR4B2
```
public static final Unisim OR4B2
```

OR4B3
```
public static final Unisim OR4B3
```

OR4B4
```
public static final Unisim OR4B4
```

OR5
```
public static final Unisim OR5
```

OR5B1
```
public static final Unisim OR5B1
```

OR5B2
```
public static final Unisim OR5B2
```

OR5B3
```
public static final Unisim OR5B3
```

OR5B4
```
public static final Unisim OR5B4
```

OR5B5
```
public static final Unisim OR5B5
```

OSERDES
```
public static final Unisim OSERDES
```

OSERDESE1
```
public static final Unisim OSERDESE1
```

OSERDESE2
```
public static final Unisim OSERDESE2
```

OSERDESE3
```
public static final Unisim OSERDESE3
```

OUT_FIFO
```
public static final Unisim OUT_FIFO
```

PCIE40E4
```
public static final Unisim PCIE40E4
```

PCIE40E5
```
public static final Unisim PCIE40E5
```

PCIE4CE4
```
public static final Unisim PCIE4CE4
```

PCIE50E5
```
public static final Unisim PCIE50E5
```

PCIE_2_1
```
public static final Unisim PCIE_2_1
```

PCIE_3_0
```
public static final Unisim PCIE_3_0
```

PCIE_3_1
```
public static final Unisim PCIE_3_1
```

PHASER_IN
```
public static final Unisim PHASER_IN
```

PHASER_IN_PHY

public static final Unisim PHASER_IN_PHY

PHASER_OUT
```
public static final Unisim PHASER_OUT
```

PHASER_OUT_PHY

public static final Unisim PHASER_OUT_PHY

PHASER_REF
```
public static final Unisim PHASER_REF
```

PHY_CONTROL
```
public static final Unisim PHY_CONTROL
```

PLLE2_ADV
```
public static final Unisim PLLE2_ADV
```

PLLE2_BASE
```
public static final Unisim PLLE2_BASE
```

PLLE3_ADV
```
public static final Unisim PLLE3_ADV
```

PLLE3_BASE
```
public static final Unisim PLLE3_BASE
```

PLLE4_ADV
```
public static final Unisim PLLE4_ADV
```

PLLE4_BASE
```
public static final Unisim PLLE4_BASE
```

PLL_ADV
```
public static final Unisim PLL_ADV
```

PLL_BASE
```
public static final Unisim PLL_BASE
```

PS7
```
public static final Unisim PS7
```

PS8
```
public static final Unisim PS8
```

PS9
```
public static final Unisim PS9
```

PSX
```
public static final Unisim PSX
```

PULLDOWN
```
public static final Unisim PULLDOWN
```

PULLUP
```
public static final Unisim PULLUP
```

PVT_SAS
```
public static final Unisim PVT_SAS
```

RAM128X1D
```
public static final Unisim RAM128X1D
```

RAM128X1S
```
public static final Unisim RAM128X1S
```

RAM128X1S_1
```
public static final Unisim RAM128X1S_1
```

RAM16X1D
```
public static final Unisim RAM16X1D
```

RAM16X1D_1
```
public static final Unisim RAM16X1D_1
```

RAM16X1S
```
public static final Unisim RAM16X1S
```

RAM16X1S_1
```
public static final Unisim RAM16X1S_1
```

RAM16X2S
```
public static final Unisim RAM16X2S
```

RAM16X4S
```
public static final Unisim RAM16X4S
```

RAM16X8S
```
public static final Unisim RAM16X8S
```

RAM256X1D
```
public static final Unisim RAM256X1D
```

RAM256X1S
```
public static final Unisim RAM256X1S
```

RAM32M
```
public static final Unisim RAM32M
```

RAM32M16
```
public static final Unisim RAM32M16
```

RAM32X16DR8
```
public static final Unisim RAM32X16DR8
```

RAM32X1D
```
public static final Unisim RAM32X1D
```

RAM32X1D_1
```
public static final Unisim RAM32X1D_1
```

RAM32X1S
```
public static final Unisim RAM32X1S
```

RAM32X1S_1
```
public static final Unisim RAM32X1S_1
```

RAM32X2S
```
public static final Unisim RAM32X2S
```

RAM32X4S
```
public static final Unisim RAM32X4S
```

RAM32X8S
```
public static final Unisim RAM32X8S
```

RAM512X1S
```
public static final Unisim RAM512X1S
```

RAM64M
```
public static final Unisim RAM64M
```

RAM64M8
```
public static final Unisim RAM64M8
```

RAM64X1D
```
public static final Unisim RAM64X1D
```

RAM64X1D_1
```
public static final Unisim RAM64X1D_1
```

RAM64X1S
```
public static final Unisim RAM64X1S
```

RAM64X1S_1
```
public static final Unisim RAM64X1S_1
```

RAM64X2S
```
public static final Unisim RAM64X2S
```

RAM64X8SW
```
public static final Unisim RAM64X8SW
```

RAMB16
```
public static final Unisim RAMB16
```

RAMB16BWE
```
public static final Unisim RAMB16BWE
```

RAMB16BWER
```
public static final Unisim RAMB16BWER
```

RAMB16BWE_S18

public static final Unisim RAMB16BWE_S18

RAMB16BWE_S18_S18

public static final Unisim RAMB16BWE_S18_S18

RAMB16BWE_S18_S9

public static final Unisim RAMB16BWE_S18_S9

RAMB16BWE_S36

public static final Unisim RAMB16BWE_S36

RAMB16BWE_S36_S18

public static final Unisim RAMB16BWE_S36_S18

RAMB16BWE_S36_S36

public static final Unisim RAMB16BWE_S36_S36

RAMB16BWE_S36_S9

public static final Unisim RAMB16BWE_S36_S9

RAMB16_S1
```
public static final Unisim RAMB16_S1
```

RAMB16_S18
```
public static final Unisim RAMB16_S18
```

RAMB16_S18_S18

public static final Unisim RAMB16_S18_S18

RAMB16_S18_S36

public static final Unisim RAMB16_S18_S36

RAMB16_S1_S1

public static final Unisim RAMB16_S1_S1

RAMB16_S1_S18

public static final Unisim RAMB16_S1_S18

RAMB16_S1_S2

public static final Unisim RAMB16_S1_S2

RAMB16_S1_S36

public static final Unisim RAMB16_S1_S36

RAMB16_S1_S4

public static final Unisim RAMB16_S1_S4

RAMB16_S1_S9

public static final Unisim RAMB16_S1_S9

RAMB16_S2
```
public static final Unisim RAMB16_S2
```

RAMB16_S2_S18

public static final Unisim RAMB16_S2_S18

RAMB16_S2_S2

public static final Unisim RAMB16_S2_S2

RAMB16_S2_S36

public static final Unisim RAMB16_S2_S36

RAMB16_S2_S4

public static final Unisim RAMB16_S2_S4

RAMB16_S2_S9

public static final Unisim RAMB16_S2_S9

RAMB16_S36
```
public static final Unisim RAMB16_S36
```

RAMB16_S36_S36

public static final Unisim RAMB16_S36_S36

RAMB16_S4
```
public static final Unisim RAMB16_S4
```

RAMB16_S4_S18

public static final Unisim RAMB16_S4_S18

RAMB16_S4_S36

public static final Unisim RAMB16_S4_S36

RAMB16_S4_S4

public static final Unisim RAMB16_S4_S4

RAMB16_S4_S9

public static final Unisim RAMB16_S4_S9

RAMB16_S9
```
public static final Unisim RAMB16_S9
```

RAMB16_S9_S18

public static final Unisim RAMB16_S9_S18

RAMB16_S9_S36

public static final Unisim RAMB16_S9_S36

RAMB16_S9_S9

public static final Unisim RAMB16_S9_S9

RAMB18
```
public static final Unisim RAMB18
```

RAMB18E1
```
public static final Unisim RAMB18E1
```

RAMB18E2
```
public static final Unisim RAMB18E2
```

RAMB18E5
```
public static final Unisim RAMB18E5
```

RAMB18E5_INT

public static final Unisim RAMB18E5_INT

RAMB18SDP
```
public static final Unisim RAMB18SDP
```

RAMB36
```
public static final Unisim RAMB36
```

RAMB36E1
```
public static final Unisim RAMB36E1
```

RAMB36E2
```
public static final Unisim RAMB36E2
```

RAMB36E5
```
public static final Unisim RAMB36E5
```

RAMB36E5_INT

public static final Unisim RAMB36E5_INT

RAMB36SDP
```
public static final Unisim RAMB36SDP
```

RAMB8BWER
```
public static final Unisim RAMB8BWER
```

RAMD32
```
public static final Unisim RAMD32
```

RAMD32M64
```
public static final Unisim RAMD32M64
```

RAMD64E
```
public static final Unisim RAMD64E
```

RAMD64E5
```
public static final Unisim RAMD64E5
```

RAMS32
```
public static final Unisim RAMS32
```

RAMS64E
```
public static final Unisim RAMS64E
```

RAMS64E1
```
public static final Unisim RAMS64E1
```

RAMS64E5
```
public static final Unisim RAMS64E5
```

RFADC
```
public static final Unisim RFADC
```

RFADC_13B4W_M0

public static final Unisim RFADC_13B4W_M0

RFADC_13B4W_M1

public static final Unisim RFADC_13B4W_M1

RFDAC
```
public static final Unisim RFDAC
```

RIU_OR
```
public static final Unisim RIU_OR
```

ROM128X1
```
public static final Unisim ROM128X1
```

ROM16X1
```
public static final Unisim ROM16X1
```

ROM256X1
```
public static final Unisim ROM256X1
```

ROM32X1
```
public static final Unisim ROM32X1
```

ROM64X1
```
public static final Unisim ROM64X1
```

RXTX_BITSLICE

public static final Unisim RXTX_BITSLICE

RX_BITSLICE
```
public static final Unisim RX_BITSLICE
```

SIM_CONFIGE2

public static final Unisim SIM_CONFIGE2

SIM_CONFIGE3

public static final Unisim SIM_CONFIGE3

SRL16
```
public static final Unisim SRL16
```

SRL16E
```
public static final Unisim SRL16E
```

SRL16E_1
```
public static final Unisim SRL16E_1
```

SRL16_1
```
public static final Unisim SRL16_1
```

SRL32E
```
public static final Unisim SRL32E
```

SRLC16
```
public static final Unisim SRLC16
```

SRLC16E
```
public static final Unisim SRLC16E
```

SRLC16E_1
```
public static final Unisim SRLC16E_1
```

SRLC16_1
```
public static final Unisim SRLC16_1
```

SRLC32E
```
public static final Unisim SRLC32E
```

STARTUPE2
```
public static final Unisim STARTUPE2
```

STARTUPE3
```
public static final Unisim STARTUPE3
```

STARTUP_SPARTAN3

public static final Unisim STARTUP_SPARTAN3

STARTUP_SPARTAN3A

public static final Unisim STARTUP_SPARTAN3A

STARTUP_SPARTAN6

public static final Unisim STARTUP_SPARTAN6

STARTUP_VIRTEX4

public static final Unisim STARTUP_VIRTEX4

STARTUP_VIRTEX5

public static final Unisim STARTUP_VIRTEX5

STARTUP_VIRTEX6

public static final Unisim STARTUP_VIRTEX6

SYSMON
```
public static final Unisim SYSMON
```

SYSMONE1
```
public static final Unisim SYSMONE1
```

SYSMONE4
```
public static final Unisim SYSMONE4
```

TEMAC_SINGLE

public static final Unisim TEMAC_SINGLE

TX_BITSLICE
```
public static final Unisim TX_BITSLICE
```

TX_BITSLICE_TRI

public static final Unisim TX_BITSLICE_TRI

URAM288
```
public static final Unisim URAM288
```

URAM288E5
```
public static final Unisim URAM288E5
```

URAM288E5_BASE

public static final Unisim URAM288E5_BASE

URAM288_BASE

public static final Unisim URAM288_BASE

USR_ACCESSE2

public static final Unisim USR_ACCESSE2

USR_ACCESS_VIRTEX4

public static final Unisim USR_ACCESS_VIRTEX4

USR_ACCESS_VIRTEX5

public static final Unisim USR_ACCESS_VIRTEX5

USR_ACCESS_VIRTEX6

public static final Unisim USR_ACCESS_VIRTEX6

VCC
```
public static final Unisim VCC
```

VCU
```
public static final Unisim VCU
```

VCU2
```
public static final Unisim VCU2
```

VDU
```
public static final Unisim VDU
```

X5PHIO_CMUIF

public static final Unisim X5PHIO_CMUIF

X5PHIO_CMU_X32

public static final Unisim X5PHIO_CMU_X32

X5PHIO_DCCINVBUF

public static final Unisim X5PHIO_DCCINVBUF

X5PHIO_XCVR_X2

public static final Unisim X5PHIO_XCVR_X2

X5PLL
```
public static final Unisim X5PLL
```

X5PLL_INTF
```
public static final Unisim X5PLL_INTF
```

X5PLL_S2P
```
public static final Unisim X5PLL_S2P
```

XADC
```
public static final Unisim XADC
```

XNOR2
```
public static final Unisim XNOR2
```

XNOR3
```
public static final Unisim XNOR3
```

XNOR4
```
public static final Unisim XNOR4
```

XNOR5
```
public static final Unisim XNOR5
```

XOR2
```
public static final Unisim XOR2
```

XOR3
```
public static final Unisim XOR3
```

XOR4
```
public static final Unisim XOR4
```

XOR5
```
public static final Unisim XOR5
```

XORCY
```
public static final Unisim XORCY
```

XORCY_D
```
public static final Unisim XORCY_D
```

XORCY_L
```
public static final Unisim XORCY_L
```

XPHY
```
public static final Unisim XPHY
```

XPIO_VREF
```
public static final Unisim XPIO_VREF
```

XPIPE_QUAD
```
public static final Unisim XPIPE_QUAD
```

XPLL
```
public static final Unisim XPLL
```

XRAM
```
public static final Unisim XRAM
```

ZHOLD_DELAY
```
public static final Unisim ZHOLD_DELAY
```

Method Detail
- values
```
public static Unisim[] values()
```
  Returns an array containing the constants of this enum type, in the order they are declared. This method may be used to iterate over the constants as follows:
```
for (Unisim c : Unisim.values())
    System.out.println(c);
```
  Returns:
  
  an array containing the constants of this enum type, in the order they are declared
- valueOf
```
public static Unisim valueOf(String name)
```
  Returns the enum constant of this type with the specified name. The string must match exactly an identifier used to declare an enum constant in this type. (Extraneous whitespace characters are not permitted.)
  
  Parameters:
  
  name - the name of the enum constant to be returned.
  
  Returns:
  
  the enum constant with the specified name
  
  Throws:
  
  IllegalArgumentException - if this enum type has no constant with the specified name
  
  NullPointerException - if the argument is null
- hasTransform
```
public boolean hasTransform(Series s)
```
  Determines if on given series, if the unisim is transformed to different unisim type(s).
  
  Parameters:
  
  s - The architectural series in question.
  
  Returns:
  
  True if unisim is transformed for the given architecture, false otherwise.
- getTransform
```
public Unisim[] getTransform(Series s)
```
  Gets the set of unisims the provided unisim transforms to in a given series.
  
  Parameters:
  
  s - The architectural series in question.
  
  Returns:
  
  An array populated with the set of unisims that emulate this unisim or an empty array if no such transform is needed.

Enum Unisim

Enum Constant Summary

Method Summary

Methods inherited from class Enum

Methods inherited from class Object

Enum Constant Detail

AIE_ML_NOC_M_AXI

AIE_ML_NOC_M_AXIS

AIE_ML_NOC_S_AXI

AIE_ML_NOC_S_AXIS

AIE_ML_PL_M_AXIS128

AIE_ML_PL_M_AXIS32

AIE_ML_PL_M_AXIS64

AIE_ML_PL_M_EVENTS

AIE_ML_PL_S_AXIS128

AIE_ML_PL_S_AXIS32

AIE_ML_PL_S_AXIS64

AIE_ML_PL_S_EVENTS

AIE_NOC_M_AXI

AIE_NOC_M_AXIS

AIE_NOC_S_AXI

AIE_NOC_S_AXIS

AIE_PL_M_AXIS128

AIE_PL_M_AXIS32

AIE_PL_M_AXIS64

AIE_PL_M_EVENTS

AIE_PL_S_AXIS128

AIE_PL_S_AXIS32

AIE_PL_S_AXIS64

AIE_PL_S_EVENTS

AMS_ADC

AMS_DAC

AND2

AND2B1

AND2B1L

AND2B2

AND3

AND3B1

AND3B2

AND3B3

AND4

AND4B1

AND4B2

AND4B3

AND4B4

AND5

AND5B1

AND5B2

AND5B3

AND5B4

AND5B5

AUTOBUF

BFR_MATMULX

BIBUF

BITSLICE_CONTROL

BSCANE2

BSCAN_SPARTAN3

BSCAN_SPARTAN3A

BSCAN_SPARTAN6

BSCAN_VIRTEX4

BSCAN_VIRTEX5

BSCAN_VIRTEX6

BUF

BUFCE_LEAF

BUFCE_ROW

BUFDIV_LEAF

BUFG

BUFGCE

BUFGCE_1

BUFGCE_DIV

BUFGCTRL

BUFGMUX

BUFGMUX_1

BUFGMUX_CTRL

BUFGMUX_VIRTEX4

BUFGP

BUFG_FABRIC

BUFG_GT

BUFG_GT_SYNC

BUFG_HM