RTLStubGenerator

```
public class RTLStubGenerator
extends Object
```
Generates Verilog or VHDL stub files to instantiate design checkpoint files. Created on: Feb 7, 2018

Fields
Modifier and Type	Field and Description
`static String`	`VERILOG_COMMENT`
`static String`	`VHDL_COMMENT`

Constructors
Constructor and Description
`RTLStubGenerator()`

All Methods Static Methods Concrete Methods
Modifier and Type	Method and Description
`static void`	`createVerilogStub(Design d, OutputStream out)`
`static void`	`createVHDLStub(Design d, OutputStream out)`
`static EDIFPort[]`	`getSortedPortList(EDIFCell c)`

Methods inherited from class Object
equals, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

public static EDIFPort[] getSortedPortList(EDIFCell c)

public static void createVerilogStub(Design d,
                                     OutputStream out)

public static void createVHDLStub(Design d,
                                  OutputStream out)

Class RTLStubGenerator