Package com.xilinx.rapidwright.timing

Interface Summary

Interface	Description
DelayModel	Provide delay lookup for logic and intra site delay.
TimingModel.GetTileAt

Class Summary

Class	Description
ClkRouteTiming	A ClkRouteTiming instance stores the clock route and timing template data.
DSPTimingData	A DSPTimingData instance stores logic delay of a DSP block in the design.
SmallDelayModel	Implement DelayModel using as small memory as possible.
TimingEdge	Edges within a TimingGraph that encapsulate logic delays, net delays, and debug information.
TimingGraph	A TimingGraph is an acyclic weighted-directed graph representing logic delays and physical net delays based on analyzing the circuits within Design objects.
TimingGroup	A TimingGroup is our main hardware abstraction proposed by our FPT'19 paper: a TimingGroup abstracts over a set of connected PIPs, Nodes, and pins in order to create a coarser grain unit for which we calculate the delay.
TimingManager	A TimingManager sets up and creates an example TimingModel and an example TimingGraph for a given Design.
TimingModel	A TimingModel calculates net delay by implementing the lightweight timing model described in our FPT'19 paper.
TimingVertex	A TimingVertex represents a node within the TimingGraph.

Enum Summary

Enum	Description
GroupDelayType	The current set of TimingGroup types including types for each of the basic wire length types, bounces, pin types, and other.
GroupDistance	Example distance categories that we created to describe some example filtering options for TimingGroups.
GroupWireDirection	The direction for the TimingGroup, which is basically either horizontal or vertical.
TimingDirection	Compass directions that are used in the naming convention for wires to represent their directions.