com.xilinx.rapidwright.debug

Class ProbeRouter

Object

com.xilinx.rapidwright.debug.ProbeRouter

public class ProbeRouter
extends Object

Constructor Summary

Constructors

Constructor and Description
ProbeRouter()

Method Summary

Modifier and Type	Method and Description
static List<EDIFHierCellInst>	findILAs(Design d)
static void	main(String[] args)
static Map<String,String>	readProbeRequestFile(String fileName)
static void	updateProbeConnections(Design d, Map<String,String> probeToTargetNets) Updates a design containing an ILA (integrated logic analyzer) probe connections that already exist in a design.
static void	updateProbeConnections(Design d, Map<String,String> probeToTargetNets, PBlock pblock) Updates a design containing an ILA (integrated logic analyzer) probe connections that already exist in a design.

Methods inherited from class Object

equals, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait

Constructor Detail

ProbeRouter

public ProbeRouter()

Method Detail

readProbeRequestFile

public static Map<String,String> readProbeRequestFile(String fileName)

updateProbeConnections

public static void updateProbeConnections(Design d,
                                          Map<String,String> probeToTargetNets)

Updates a design containing an ILA (integrated logic analyzer) probe connections that already exist in a design.

Parameters:

d - The existing placed and routed design with an ILA.

probeToTargetNets - A map from probe names to desired net names (full hierarchical names).

updateProbeConnections

public static void updateProbeConnections(Design d,
                                          Map<String,String> probeToTargetNets,
                                          PBlock pblock)

Updates a design containing an ILA (integrated logic analyzer) probe connections that already exist in a design.

Parameters:

d - The existing placed and routed design with an ILA.

probeToTargetNets - A map from probe names to desired net names (full hierarchical names).

pblock - An optional pblock (area constraint) to contain routing within a certain area.

findILAs

public static List<EDIFHierCellInst> findILAs(Design d)

main

public static void main(String[] args)