| Class | Description |
|---|---|
| BitLocation |
Stores the unique information to identify a configuration
bit location.
|
| Bitstream |
Represents a parsed bitstream into header and packets.
|
| BitstreamHeader |
Represents the header of a bitstream file (.bit).
|
| Block |
Represents a configuration block in the configuration
array of the device.
|
| BlockSubType |
Captures the details associated with configuration blocks.
|
| ConfigArray |
Represents the array of configuration blocks
that configures the device.
|
| ConfigRow |
Configuration row.
|
| CRC |
Xilinx devices use a 32-bit CRC (CRC-32C) to validate bitstream integrity.
|
| FAR |
Representation for the frame address register functionality.
|
| Frame |
Represents a configuration frame (part of a configuration block)
|
| IDCode |
Keeps track of all device IDCodes.
|
| Packet |
Represents Type I and Type II packets for at least
Series 7, UltraScale and UltraScale+ devices.
|
| Enum | Description |
|---|---|
| BlockType |
Enumeration of the configuration block types as specified
in the Frame Address Register fields.
|
| CMDCode |
Command Register Codes (see UG570)
|
| OpCode |
Enumeration of the opcode field in both type 1 and type 2 packets.
|
| PacketType |
Enumeration of the packet type field as specified in the
frame address register field.
|
| RegisterType |
Enumeration of all configuration registers
|